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| 型號： | ATTINY84-20SSU |
| 廠商： | Atmel |
| 文件頁數(shù)： | 48/238頁 |
| 文件大?。?/td> | 0K |
| 描述： | MCU AVR 8K ISP FLASH 2.7V 14SOIC |
| 產(chǎn)品培訓(xùn)模塊： | MCU Product Line Introduction tinyAVR Introduction |
| 標準包裝： | 57 |
| 系列： | AVR® ATtiny |
| 核心處理器： | AVR |
| 芯體尺寸： | 8-位 |
| 速度： | 20MHz |
| 連通性： | USI |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 12 |
| 程序存儲器容量： | 8KB（4K x 16） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 512 x 8 |
| RAM 容量： | 512 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 613 (CN2011-ZH PDF) |
| 配用： | ATSTK600-RC46-ND - STK600 ROUTING CARD AVR ATSTK600-ND - DEV KIT FOR AVR/AVR32 ATAVRISP2-ND - PROGRAMMER AVR IN SYSTEM |
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2001 Microchip Technology Inc.
DS39026C-page 139
PIC18CXX2
14.4.8
I2C MASTER MODE
TRANSMISSION
Transmission of a data byte, a 7-bit address, or the
other half of a 10-bit address, is accomplished by sim-
ply writing a value to the SSPBUF register. This action
will set the buffer full flag bit, BF, and allow the baud
rate generator to begin counting and start the next
transmission. Each bit of address/data will be shifted
out onto the SDA pin after the falling edge of SCL is
asserted (see data hold time specification parameter
106). SCL is held low for one baud rate generator roll-
over count (TBRG). Data should be valid before SCL is
released high (see Data setup time specification
parameter 107). When the SCL pin is released high, it
is held that way for TBRG. The data on the SDA pin
must remain stable for that duration and some hold
time after the next falling edge of SCL. After the eighth
bit is shifted out (the falling edge of the eighth clock),
the BF flag is cleared and the master releases SDA.
allowing the slave device being addressed to respond
with an ACK bit during the ninth bit time, if an address
match occurs, or if data was received properly. The sta-
tus of ACK is written into the ACKDT bit on the falling
edge of the ninth clock. If the master receives an
Acknowledge, the Acknowledge status bit, ACKSTAT,
is cleared. If not, the bit is set. After the ninth clock, the
SSPIF bit is set and the master clock (baud rate gener-
ator) is suspended until the next data byte is loaded into
the SSPBUF, leaving SCL low and SDA unchanged
After the write to the SSPBUF, each bit of address will
be shifted out on the falling edge of SCL until all seven
address bits and the R/W bit are completed. On the fall-
ing edge of the eighth clock, the master will de-assert
the SDA pin, allowing the slave to respond with an
Acknowledge. On the falling edge of the ninth clock, the
master will sample the SDA pin to see if the address
was recognized by a slave. The status of the ACK bit is
loaded into the ACKSTAT status bit (SSPCON2<6>).
Following the falling edge of the ninth clock transmis-
sion of the address, the SSPIF is set, the BF flag is
cleared and the baud rate generator is turned off until
another write to the SSPBUF takes place, holding SCL
low and allowing SDA to float.
14.4.8.1
BF Status Flag
In Transmit mode, the BF bit (SSPSTAT<0>) is set
when the CPU writes to SSPBUF and is cleared, when
all 8 bits are shifted out.
14.4.8.2
WCOL Status Flag
If the user writes the SSPBUF when a transmit is
already in progress, (i.e., SSPSR is still shifting out a
data byte), the WCOL is set and the contents of the
buffer are unchanged (the write doesn’t occur).
WCOL must be cleared in software.
14.4.8.3
ACKSTAT Status Flag
In Transmit mode, the ACKSTAT bit (SSPCON2<6>) is
cleared when the slave has sent an Acknowledge
(ACK = 0), and is set when the slave does not Acknowl-
edge (ACK = 1). A slave sends an Acknowledge when
it has recognized its address (including a general call),
or when the slave has properly received its data.
14.4.9
I2C MASTER MODE RECEPTION
Master mode reception is enabled by programming the
receive enable bit, RCEN (SSPCON2<3>).
The baud rate generator begins counting, and on each
rollover, the state of the SCL pin changes (high to low/
low to high) and data is shifted into the SSPSR. After
the falling edge of the eighth clock, the receive enable
flag is automatically cleared, the contents of the
SSPSR are loaded into the SSPBUF, the BF flag bit is
set, the SSPIF flag bit is set and the baud rate genera-
tor is suspended from counting, holding SCL low. The
MSSP is now in IDLE state, awaiting the next com-
mand. When the buffer is read by the CPU, the BF flag
bit is automatically cleared. The user can then send an
Acknowledge bit at the end of reception, by setting the
Acknowledge
sequence
enable
bit,
ACKEN
(SSPCON2<4>).
14.4.9.1
BF Status Flag
In receive operation, the BF bit is set when an address
or data byte is loaded into SSPBUF from SSPSR. It is
cleared when the SSPBUF register is read.
14.4.9.2
SSPOV Status Flag
In receive operation, the SSPOV bit is set when 8 bits
are received into the SSPSR and the BF flag bit is
already set from a previous reception.
14.4.9.3
WCOL Status Flag
If the user writes the SSPBUF when a receive is
already in progress (i.e., SSPSR is still shifting in a data
byte), the WCOL bit is set and the contents of the buffer
are unchanged (the write doesn’t occur).
Note:
The MSSP module must be in an IDLE
state before the RCEN bit is set, or the
RCEN bit will be disregarded.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATTINY84-20SSUR | 功能描述:8位微控制器 -MCU AVR 8KB FLSH 512B EE 512B SRAM-10MHz, IND RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ATTINY84A | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 2K/4K/8K Bytes In-System Programmable Flash |
| ATTINY84A-CCU | 功能描述:8位微控制器 -MCU 20MHz Ind. Grade RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ATTINY84A-CCUR | 功能描述:8位微控制器 -MCU 20MHz Ind. Grade RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| ATTINY84A-MF | 制造商:Atmel Corporation 功能描述:IC MCU 8BIT 8KB FLASH 20QFN 制造商:Atmel Corporation 功能描述:AVR, 8K FLASH 2K SRAM, 1KB EEPROM - 16MHz, 4x4 WQFN, High Grade +125C, Green |
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