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| 型號： | AVIIVA |
| 英文描述： | AVIIVA M2 LV 0514/1010/1014/2010/2014/4010 [Updated 4/03. 18 Pages] 512 active pixels. 14 ?m pixel. from 20 MHz to 60 MHz data rate LVDS interface. |
| 中文描述： | AVIIVA產(chǎn)品供應(yīng)M2呂0514/1010/1014/2010/2014/4010 [更新4 / 03。 18頁] 512有效像素。 14？米像素。從20 MHz到60 MHz的數(shù)據(jù)速率LVDS接口。 |
| 文件頁數(shù)： | 3/18頁 |
| 文件大小： | 294K |
| 代理商： | AVIIVA |
3
AViiVA M2 LV
2161B–IMAGE–04/03
Camera
Description
Figure 1.
Camera Synoptic
The LVDS linescan camera is based on a two-tap linear CCD. Therefore, two analog chains
process odd and even pixel outputs of the linear sensor. The CCD signal processing encom-
passes the correlated double sampling (CDS), the dark level correction (dark pixel clamping),
the gain (PGA) and offset correction and finally the analog to digital conversion on 12-bit.
Note:
PGA stands for Programmable Gain Array.
The camera is powered by a single DC power supply from 12V to 24V.
The functional interface (data and control) is provided with LVDS transceivers.
The data can be delivered either on two channels or on a single multiplexed channel. The data
format can be configured in 8-, 10- or 12-bit.
The camera can be used with external triggers (TRIG1 and TRIG2 signals) in different trigger
modes (see “Synchronization Mode” on page 6). The camera can be also clocked externally,
allowing system synchronization and/or multi-camera synchronization.
The camera configuration and settings are performed via a serial line.
This interface is used for:
Gain, offset setting.
Dynamic range, data rate setting.
Trigger mode setting: free run or external trigger modes.
Integration time setting: in free running and external trigger mode.
Linear CCD
2 taps
CCD Drivers
Even pixels analog chain
PGA, CDS, ADC
12-bit at 30 Mpixels/s
Odd pixels analog chain
PGA, CDS, ADC
12-bit at 30 Mpixels/s
Microcontroller
LVDS
transceiver
TX
RX
Power supplies
DC power
LVDS I/F
Sequencer
controller
DATA
Serial line
TRIG1,
TRIG2
STROBE,
LVAL
CLOCK_IN
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