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| 型號(hào)： | AX1000-1FG484X79 |
| 元件分類(lèi)： | FPGA |
| 英文描述： | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA484 |
| 封裝： | 1 MM PITCH, FBGA-484 |
| 文件頁(yè)數(shù)： | 150/230頁(yè) |
| 文件大小： | 6485K |
| 代理商： | AX1000-1FG484X79 |
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Axcelerator Family FPGAs
2- 12
v2.8
5V Tolerance
There are two schemes to achieve 5V tolerance:
1. 3.3V PCI and 3.3V PCI-X are the only I/O standards
that directly allow 5V tolerance. To implement this,
an internal clamp diode between the input pad and
the VCCI pad is enabled so that the voltage at the
input pin is clamped as shown in EQ 2-3:
Vinput = VCCI + Vdiode = 3.3V + 0.8V = 4.1V
EQ 2-3
An external series resister (~100
Ω) is required between
the input pin and the 5V signal source to limit the
current (Figure 2-3).
2. 5V tolerance can also be achieved with 3.3V I/O
standards (3.3V PCI, 3.3V PCI-X, and LVTTL) using a
bus-switch product (e.g. IDTQS32X2384). This will
convert the 5V signal to a 3.3V signal with minimum
delay (Figure 2-4).
Simultaneous Switching Outputs (SSO)
When multiple output drivers switch simultaneously,
they induce a voltage drop in the chip/package power
distribution. This simultaneous switching momentarily
raises the ground voltage within the device relative to
the system ground. This apparent shift in the ground
potential to a non-zero value is known as simultaneous
switching noise (SSN) or more commonly, ground
bounce.
SSN becomes more of an issue in high pin count
packages and when using high performance devices such
as the Axcelerator family. Based upon testing, Actel
recommends that users not exceed eight simultaneous
switching outputs (SSO) per each VCCI/GND pair. To ease
this potential burden on designers, Actel has designed all
of the Axcelerator BGAs3 to not exceed this limit with
the exception of the CS180, which has an I/O to VCCI/GND
pair ratio of nine to one.
Please refer to the Simultaneous Switching Noise and
Signal Integrity application note for more information.
I/O Banks and Compatibility
Since each I/O bank has its own user-assigned input
reference voltage (VREF) and an input/output supply
voltage (VCCI), only I/Os with compatible standards can
be assigned to the same bank.
Table 2-11 shows the compatible I/O standards for a
common
VREF
(for
voltage-referenced
standards).
Similarly, Table 2-12 shows compatible standards for a
common VCCI.
summarizes
the
different
combinations of voltages and I/O standards that can be
used together in the same I/O bank. Note that two I/O
standards are compatible if:
Their VCCI values are identical.
Their VREF standards are identical (if applicable).
Figure 2-3 Use of an External Resistor for 5V Tolerance
Figure 2-4 Bus Switch IDTQS32X2384
Non-Actel Part
Actel FPGA
5V
3.3V
PCI
clamp
diode
Rext
5V
3.3V
20X
5V
3. The user should note that in Bank 8 of both AX1000-FG484 and AX500-FG484, there are local violations of this 8:1 ratio.
Table 2-11 Compatible I/O Standards for Different VREF
Values
VREF
Compatible Standards
1.5V
SSTL 3 (Class I and II)
1.25V
SSTL 2 (Class I and II)
1.0V
GTL+ (2.5V and 3.3V Outputs)
0.75V
HSTL (Class I)
Table 2-12 Compatible I/O Standards for Different VCCI
Values
VCCI
1
Compatible Standards
VREF
3.3V
LVTTL, PCI, PCI-X, LVPECL, GTL+ 3.3V
1.0
3.3V
SSTL 3 (Class I and II), LVTTL, PCI, LVPECL
1.5
2.5V
LVCMOS 2.5V, GTL+ 2.5V, LVDS2
1.0
2.5V
LVCMOS 2.5V, SSTL 2 (Classes I and II), LVDS2
1.25
1.8V
LVCMOS 1.8V
N/A
1.5V
LVCMOS 1.5V, HSTL Class I
0.75
Notes:
1. VCCI is used for both inputs and outputs
2. VCCI tolerance is ±5%
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AX1000-1FG484 | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA484 |
| AX1000-1FG676IX79 | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA676 |
| AX1000-1FG676I | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA676 |
| AX1000-1FG676MX79 | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA676 |
| AX1000-1FG676M | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA676 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AX1000-1FG676 | 功能描述:IC FPGA AXCELERATOR 1M 676-FBGA RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Axcelerator 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門(mén)數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
| AX1000-1FG676I | 功能描述:IC FPGA AXCELERATOR 1M 676-FBGA RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Axcelerator 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門(mén)數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
| AX1000-1FG676M | 制造商:Microsemi Corporation 功能描述:FPGA Axcelerator Family 612K Gates 12096 Cells 763MHz 0.15um Technology 1.5V 676-Pin FBGA 制造商:Microsemi Corporation 功能描述:FPGA AXCELERATOR 612K GATES 12096 CELLS 763MHZ 0.15UM 1.5V 6 - Trays |
| AX1000-1FG896 | 功能描述:IC FPGA AXCELERATOR 1M 896-FBGA RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Axcelerator 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門(mén)數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類(lèi)型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
| AX1000-1FG896B | 制造商:ACTEL 制造商全稱(chēng):Actel Corporation 功能描述:Axcelerator Family FPGAs |
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