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參數(shù)資料
| 型號(hào)： | AX1000-1FG896X79 |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA896 |
| 封裝： | 1 MM PITCH, FBGA-896 |
| 文件頁(yè)數(shù)： | 192/230頁(yè) |
| 文件大?。?/td> | 6485K |
| 代理商： | AX1000-1FG896X79 |
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Axcelerator Family FPGAs
2- 50
v2.8
Routing Specifications
Routing Resources
The routing structure found in Axcelerator devices
enables any logic module to be connected to any other
logic module while retaining high performance. There
are multiple paths and routing resources that can be
used to route one logic module to another, both within a
SuperCluster and elsewhere on the chip.
There are four primary types of routing within the AX
architecture: DirectConnect, CarryConnect, FastConnect,
and Vertical and Horizontal Routing.
DirectConnect
DirectConnects
provide
a
high-speed
connection
between an R-cell and its adjacent C-cell (Figure 2-35).
This connection can be made from DCOUT of the C-cell
to DCIN of the R-cell by configuring of the S1 line of the
R-cell. This provides a connection that does not require
an antifuse and has a delay of less than 0.1 ns.
CarryConnect
CarryConnects are used to build carry chains for
arithmetic functions (Figure 2-35). The FCO output of the
right C-cell of a two-C-cell Cluster drives the FCI input of
the left C-cell in the two-C-cell Cluster immediately
below it. This pattern continues down both sides of each
SuperCluster column.
Similar to the DirectConnects, CarryConnects can be built
without an antifuse connection. This connection has a
delay of less than 0.1 ns from the FCO of one two-C-cell
cluster to the FCI of the two-C-cell cluster immediately
below it (see the "Carry-Chain Logic" on page 2-45 for
more information).
FastConnect
For high-speed routing of logic signals, FastConnects can
be used to build a short distance connection using a
single antifuse (Figure 2-36 on page 2-51). FastConnects
provide a maximum delay of 0.3 ns. The outputs of each
logic module connect directly to the Output Tracks
within a SuperCluster. Signals on the Output Tracks can
then be routed through a single antifuse connection to
drive the inputs of logic modules either within one
SuperCluster or in the SuperCluster immediately below
it.
Vertical and Horizontal Routing
Vertical and Horizontal Tracks provide both local and
long distance routing (Figure 2-37 on page 2-51). These
tracks are composed of both short-distance, segmented
routing and across-chip routing tracks (segmented at
core tile boundaries). The short-distance, segmented
routing resources can be concatenated through antifuse
connections to build longer routing tracks.
These short-distance routing tracks can be used within
and between SuperClusters or between modules of non-
adjacent SuperClusters. They can be connected to the
Output Tracks and to any logic module input (R-cell,
C-cell, Buffer, and TX module).
The across-chip horizontal and vertical routing provides
long-distance
routing
resources.
These
resources
interface with the rest of the routing structures through
Figure 2-35 DirectConnect and CarryConnect
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AX1000-1FG896 | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA896 |
| AX1000-1FGG484I | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA484 |
| AX1000-1FGG484M | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA484 |
| AX1000-1FGG484 | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA484 |
| AX1000-1FGG676I | FPGA, 12096 CLBS, 612000 GATES, 763 MHz, PBGA676 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AX1000-1FGG484 | 功能描述:IC FPGA AXCELERATOR 1M 484-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Axcelerator 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門(mén)數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
| AX1000-1FGG484I | 功能描述:IC FPGA AXCELERATOR 1M 484-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Axcelerator 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門(mén)數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
| AX1000-1FGG484M | 制造商:Microsemi Corporation 功能描述:FPGA AXCELERATOR 612K GATES 12096 CELLS 763MHZ 0.15UM 1.5V 4 - Trays 制造商:Microsemi Corporation 功能描述:IC FPGA 317 I/O 484FBGA |
| AX1000-1FGG676 | 功能描述:IC FPGA AXCELERATOR 1M 676-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Axcelerator 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門(mén)數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
| AX1000-1FGG676I | 功能描述:IC FPGA AXCELERATOR 1M 676-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:Axcelerator 產(chǎn)品培訓(xùn)模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產(chǎn)品:Cyclone? IV FPGAs 標(biāo)準(zhǔn)包裝:60 系列:CYCLONE® IV GX LAB/CLB數(shù):9360 邏輯元件/單元數(shù):149760 RAM 位總計(jì):6635520 輸入/輸出數(shù):270 門(mén)數(shù):- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FBGA（23x23） |
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