Axcelerator Family FPGAs
3- 116
v2.8
IO258NB6F24
V3
IO258PB6F24
W3
IO259NB6F24
AA2
IO259PB6F24
AB2
IO260NB6F24
V6*
IO260PB6F24
W4*
IO262NB6F24
U4
IO262PB6F24
V4
IO263NB6F24
Y5
IO263PB6F24
W5
IO268NB6F25
U6
IO268PB6F25
U5
IO269PB6F25
U3
IO272NB6F25
T2
IO272PB6F25
U2
IO273NB6F25
W2
IO273PB6F25
Y2
IO274NB6F25
R6
IO274PB6F25
T6
IO275NB6F25
T7
IO275PB6F25
U7
IO277NB6F25
V2
IO278NB6F26
R4
IO278PB6F26
T4
IO279PB6F26
R3
IO280NB6F26
R5
IO281NB6F26
AA1
IO281PB6F26
AB1
IO284NB6F26
R8
IO284PB6F26
T8
IO285NB6F26
W1
IO285PB6F26
Y1
IO286NB6F26
P2
IO286PB6F26
R2
IO287NB6F26
T1
IO287PB6F26
U1
624-Pin CCGA
AX2000 Function
Pin Number
* Not routed on the same package layer
and to adjacent LGA pads as its differential
pair complement. Recommended to be
used as a single-ended I/O.
IO288NB6F26
P5
IO290NB6F27
P6
IO291NB6F27
P1
IO291PB6F27
R1
IO292NB6F27
P7
IO292PB6F27
R7
IO293NB6F27
M1
IO293PB6F27
N1
IO294NB6F27
P8
IO296NB6F27
N3
IO296PB6F27
P3
IO298NB6F27
N4
IO298PB6F27
P4
IO299NB6F27
M2
IO299PB6F27
N2
Bank 7
IO300NB7F28
P9*
IO300PB7F28
N6*
IO302NB7F28
M6
IO304NB7F28
N8
IO304PB7F28
N7
IO308NB7F28
M4
IO309NB7F28
L3
IO309PB7F28
M3
IO310NB7F29
N10
IO310PB7F29
N9
IO311NB7F29
K1
IO311PB7F29
L1
IO313NB7F29
M5
IO316NB7F29
L6
IO316PB7F29
L5
IO317NB7F29
K2
IO317PB7F29
L2
IO318NB7F29
K4
IO318PB7F29
L4
IO320NB7F29
J3
624-Pin CCGA
AX2000 Function
Pin Number
* Not routed on the same package layer
and to adjacent LGA pads as its differential
pair complement. Recommended to be
used as a single-ended I/O.
IO321NB7F30
J2
IO321PB7F30
J1
IO323NB7F30
L7
IO323PB7F30
M7
IO324NB7F30
M9
IO324PB7F30
M8
IO327NB7F30
F1
IO327PB7F30
G1
IO328NB7F30
K7
IO328PB7F30
K6
IO329NB7F30
D1
IO329PB7F30
E1
IO331PB7F30
G2
IO332NB7F31
H3
IO332PB7F31
H2
IO333NB7F31
E2
IO333PB7F31
F2
IO334NB7F31
H4
IO334PB7F31
J4
IO335NB7F31
H5
IO335PB7F31
H6
IO337NB7F31
D2
IO338NB7F31
J6
IO338PB7F31
J5
IO339NB7F31
F3
IO339PB7F31
E3
IO340NB7F31
G4*
IO340PB7F31
G3*
IO341NB7F31
K8
IO341PB7F31
L8
Dedicated I/O
GND
K5
GND
A18
GND
A2
GND
A24
GND
A25
624-Pin CCGA
AX2000 Function
Pin Number
* Not routed on the same package layer
and to adjacent LGA pads as its differential
pair complement. Recommended to be
used as a single-ended I/O.