Philips Semiconductors
Product specification
74ABT16374B
74ABTH16374B
16-bit D-type flip-flop; positive-edge trigger
(3-State)
1998 Feb 27
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
°
C
T
amb
= –40
°
C
to +85
°
C
UNIT
MIN
TYP
MAX
MIN
MAX
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; I
O
= 1mA; V
I
= GND or V
CC
–0.9
–1.2
–1.2
V
2.5
2.9
2.5
V
OH
High-level output voltage
3.0
3.4
3.0
V
2.0
2.4
2.0
V
OL
V
RST
Low-level output voltage
Power-up output voltage
3
0.42
0.55
0.55
V
0.13
0.55
0.55
V
Input leakag
74ABT16374B
I
CC
CC
V
= 5 5V; V = V
I
= V
or GND
0 01
0.01
±
1
±
1
μ
A
I
Input leakage current
In ut leakage current
74ABTH16374B
V
CC
= 5.5V; V
I
= V
CC
or
GND
Control pins
±
0.01
±
1
±
1
I
I
V
CC
= 5.5V; V
I
= V
CC
V
CC
= 5.5V; V
I
= 0
V
CC
= 4.5V; V
I
= 0.8V
V
CC
= 4.5V; V
I
= 2.0V
V
CC
= 5.5V; V
I
= 0 to 5.5V
V
CC
= 0.0V; V
O
or V
I
≤
4.5V
V
CC
= 2.1V; V
O
= 0.5V;
V
I
= GND or V
CC
; V
OE
= GND
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3-State;
V
I
CC
Data pins
5
0.01
1
1
μ
A
–1
–3
–5
Bus H ld
74ABTH16374B
t i
t
6
50
50
I
HOLD
–75
±
800
–75
μ
A
I
OFF
Power-off leakage current
±
5.0
±
100
±
100
μ
A
I
PU/PD
Power-up/down 3-State
output current
4
±
5.0
±
50
±
50
μ
A
I
OZH
I
OZL
I
CEX
I
O
I
CCH
I
CCL
3-State output High current
0.5
10
10
μ
A
μ
A
μ
A
3-State output Low current
–0.5
–10
–10
Output High leakage current
Output current
1
5.0
50
50
–50
–70
–180
–50
–180
mA
0.5
2
2
mA
Quiescent supply current
8
19
19
mA
I
CCZ
0.5
2
2
mA
I
CC
Additional supply current
per input pin
2
74ABT16374B
V
CC
= 5.5V; one input at 3.4V, other inputs at
V
CC
or GND
5
100
100
μ
A
I
CC
Additional supply current
per input pin
2
74ABTH16374B
V
CC
= 5.5V; one input at 3.4V, other inputs at
V
CC
or GND
0.5
1.5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
between 0V and 2.1V with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
= 5V
±
10% a
transition time of up to 100
μ
sec is permitted.
5. Unused pins at V
CC
or GND.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.