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參數(shù)資料
| 型號(hào)： | BH1JLB1WHFV-TR |
| 元件分類： | 固定正電壓?jiǎn)温份敵鰳?biāo)準(zhǔn)穩(wěn)壓器 |
| 英文描述： | FIXED POSITIVE REGULATOR, PDSO5 |
| 封裝： | HVSOF-5 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大小： | 850K |
| 代理商： | BH1JLB1WHFV-TR |
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Block diagrams
Power supply input
Ground
Output voltage ON/OFF control
(High: ON, Low: OFF)
NO CONNECT
Voltage output
Output voltage ON/OFF control
(High: ON, Low: OFF)
Ground
Power supply input
Voltage output
NO CONNECT
Power supply input
Voltage output
Noise reducing capacitor
ground terminal
Ground
Output voltage ON/OFF control
(High: ON, Low: OFF)
Terminal No. Terminal Name
Function
Power dissipation Pd
1. Power dissipation
Power dissipation calculation include estimates of power dissipation characteristics and internal IC power consumption
and should be treated as guidelines. In the event that the IC is used in an environment where this power dissipation is
exceeded, the attendant rise in the junction temperature will trigger the thermal shutdown circuit, reducing the current
capacity and otherwise degrading the IC's design performance. Allow for sufficient margins so that this power dissipation
is not exceeded during IC operation.
Calculating the maximum internal IC power consumption (PMAX)
Input voltage
Output voltage
Output current
2. Power dissipation characteristics (Pd)
Board: 70 mm X 70 mm X 1.6 mm
Material: Glass epoxy PCB
Board: 70 mm X 70 mm X 1.6 mm
Material: Glass epoxy PCB
Board: 70 mm X 70 mm X 1.6 mm
Material: Glass epoxy PCB
Fig. 26: HVSOF6
Power Dissipation/
Power Dissipation Reduction (Example)
Fig. 27: HVSOF5
Power Dissipation/
Power Dissipation Reduction (Example)
Fig. 28: SSOP5
Power Dissipation/
Power Dissipation Reduction (Example)
Circuit design should allow a sufficient margin for the temperature range so that PMAX < Pd.
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