IDT / ICS 700MHZ, 3.3V LVPECL FREQUENCY SYNTHESIZER
11
ICS8430B-71 REV A NOVEMBER 20, 2006
ICS8430B-71
700MHZ, CRYSTAL INTERFACE/LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
FIGURE 5A. SCHEMATIC OF RECOMMENDED LAYOUT
S_LOAD
TL1
Zo = 50 Ohm
R7
10
C14
0.1u
C2
S_CLOCK
VCC
VC
C
C16
10u
X1
R1
125
FO
U
T
REF_IN
TL2
Zo = 50 Ohm
R4
84
C1
U1
ICS8430B-71
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
32
31
30
29
28
27
26
25
M5
M6
M7
M8
N0
N1
N2
VEE
TE
S
T
VC
C
FO
UT1
nF
O
U
T
1
V
CCO
FO
UT0
nF
O
U
T
0
VEE
MR
S_CLOCK
S_DATA
S_LOAD
VCCA
XTAL_SEL
TEST_CLK
X_OUT
M4
M3
M2
M1
M0
VC
O_SEL
nP
_
LO
A
D
X_
IN
R3
125
R2
84
C11
0.01u
IN+
XTAL_SEL
C15
0.1u
IN-
+
-
FO
U
TN
VCC
VCCA
VC
C
S_DATA
LAYOUT GUIDELINE
The schematic of the ICS8430B-71 layout example used in this
layout guideline is shown in
Figure 5A. The ICS8430B-71
recommended PCB board layout for this example is shown in
Figure 5B. This layout example is used as a general guideline.
The layout in the actual system will depend on the selected
component types, the density of the components, the density
of the traces, and the stack up of the P.C. board.