參數(shù)資料
型號(hào)： BSP206
廠商： NXP SEMICONDUCTORS
元件分類： JFETs
英文描述： P-channel enhancement mode vertical D-MOS transistor
中文描述： 0.35 A, 60 V, 6 ohm, P-CHANNEL, Si, POWER, MOSFET
封裝： PLASTIC, SOT-223, 4 PIN
文件頁數(shù)： 3/12頁
文件大小： 65K
代理商： BSP206
April 1995
3
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BSP206
RATINGS
THERMAL RESISTANCE
Note
1.
Device mounted on an epoxy printed-circuit board 40 mm
×
40 mm
×
1.5 mm; mounting pad for the drain lead min.
6 cm
2
.
CHARACTERISTICS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Drain-source voltage
Gate-source voltage (open drain)
Drain current (DC)
Drain current (peak)
Total power dissipation up to T
amb
= 25
°
C (note 1)
Storage temperature range
Junction temperature
V
DS
±
V
GSO
I
D
I
DM
P
tot
T
stg
T
j
max.
max.
max.
max.
max.
65 to
+
150
°
C
max.
60 V
20 V
350 mA
700 mA
1.5 W
150
°
C
From junction to ambient (note 1)
R
th j-a
=
83.3 K/W
T
j
= 25
°
C unless otherwise specified
Drain-source breakdown voltage
I
D
= 10
μ
A; V
GS
= 0
Drain-source leakage current
V
DS
= 48 V; V
GS
= 0
Gate-source leakage current
±
V
GS
= 20 V; V
DS
= 0
Gate threshold voltage
I
D
= 1 mA; V
DS
= V
GS
Drain-source ON-resistance
I
D
= 200 mA;
V
GS
= 10 V
Transfer admittance
I
D
= 200 mA;
V
DS
= 15 V
Input capacitance at f = 1 MHz;
V
DS
= 10 V; V
GS
= 0
Output capacitance at f = 1 MHz;
V
DS
= 10 V; V
GS
= 0
Feedback capacitance at f = 1 MHz;
V
DS
= 10 V; V
GS
= 0
Switching times (see Figs 2 and 3)
I
D
= 200 mA;
V
DD
= 50 V;
V
GS
= 0 to 10 V
V
(BR)DSS
min.
60 V
I
DSS
max.
1.0
μ
A
±
I
GSS
max.
100 nA
V
GS(th)
min.
max.
typ.
max.
min.
typ.
typ.
max.
typ.
max.
typ.
max.
1.5
3.5
4.5
V
V
mS
mS
pF
pF
pF
pF
pF
pF
R
DS(on)
6
Y
fs
100
200
55
70
30
45
C
iss
C
oss
C
rss
8
12
typ.
max.
4
8
ns
ns
t
on
t
off
typ.
max.
15
25
ns
ns
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