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參數(shù)資料
| 型號(hào)： | BU-61559D2-480W |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP78 |
| 封裝： | 45.70 X 53.30 MM, 5.30 MM HEIGHT, CERAMIC, DDIP-78 |
| 文件頁(yè)數(shù)： | 18/32頁(yè) |
| 文件大?。?/td> | 438K |
| 代理商： | BU-61559D2-480W |
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25
Data Device Corporation
www.ddc-web.com
BU-61559 Series
E-03/06-0
Logic +5V Supply
+5V Logic
14
27
Logic Ground
Logic Gnd
21
78
CH. A -15V/-12V Supply
-15/-12VA
39
42
CH. A +5V Supply
+5VA
77
43
CH. A Transceiver Ground
GndA
38
44
CH. B -15V/-12V Supply
-15/-12VB
18
35
CH. B +5V Supply
+5VB
58
36
CH. B Transceiver Ground
GndB
19
37
SIGNAL NAME
PIN NO.
DESCRIPTION
DIP FLAT
POWER AND GROUND (8)
16-bit bidirectional data bus. This bus is
used for interfacing the host processor
to the internal registers and 8K words of
RAM. In addition, in the transparent
mode, this bus allows data transfers to
take place between the internal proto-
col/memory management logic and up
to 64K X 16 of external RAM. Most of
the time, the outputs for D15 through D0
are in their high impedance state. They
drive outward when the host CPU reads
the internal RAM or registers, or when
the protocol /memory management logic
is accessing (either reading or writing)
internal RAM or writing to external RAM
when in the transparent mode. D15-D0
assume their high-impedance states fol-
lowing power turn-on reset.
D15 (MSB)
48
16
D14
8
15
D13
47
14
D12
7
13
D11
46
12
D10
6
11
D9
45
10
D8
5
9
D7
44
8
D6
4
7
D5
43
6
D4
3
5
D3
42
4
D2
2
3
D1
41
2
D0 (LSB)
1
SIGNAL NAME
DESCRIPTION
DIP FLAT
DATA BUS (16)
16-bit bidirectional address bus. In both
the buffered and transparent modes, the
host CPU accesses the BU-61559 reg-
isters and 8K words of internal RAM by
means of A12 through A0. In the trans-
parent mode, A15-A0 drive outward
(towards the CPU) in order for the 1553
protocol/memory management logic to
access up to 64K X 16 of external RAM.
Most of the time, including immediately
after power turn-on RESET, the A15-A0
outputs will be in their disabled (high
impedance) state.
A15 (MSB)
29
62
A14
67
63
A13
28
64
A12
66
65
A11
27
66
A10
65
67
A9
26
68
A8
64
69
A7
25
70
A6
63
71
A5
24
72
A4
62
73
A3
23
74
A2
61
75
A1
22
76
A0 (LSB)
60
77
SIGNAL NAME
DESCRIPTION
DIP FLAT
ADDRESS BUS (16)
TABLE 7. SIGNAL DESCRIPTIONS BY FUNCTIONAL GROUPS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BU-61559F1-140Q | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78 |
| BU-61559F1-430 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78 |
| BU-61559F1-450 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78 |
| BU-61559F1-500Z | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78 |
| BU-61559F2-110L | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP78 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BU-61580 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553 Components |ACE |
| BU-61580G1-100 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
| BU-61580G1-110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
| BU-61580G1-120 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
| BU-61580G1-200 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MIL-STD-1553/ARINC Bus Controller/RTU |
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