參數(shù)資料
型號: BU-61703F3-480L
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝: CERAMIC, QFP-72
文件頁數(shù): 24/54頁
文件大?。?/td> 576K
代理商: BU-61703F3-480L
30
Data Device Corporation
www.ddc-web.com
BU-61703/61705
D1 web-09/02-0
FIGURE 13. CLOCK EDGE SIGNAL TIMING
CLOCK IN
SIGNAL IN
SIGNAL OUT
HIGH TO LOW
SIGNAL OUT
LOW TO HIGH
t1
t2
t3
CLOCK EDGE TO SIGNAL IN / OUT TIMING
t1
SIGNAL INPUT setup time prior to CLOCK IN rising edge
10
ns
t2
CLOCK IN rising edge to SIGNAL OUTPUT driven low (see Note)
ns
t3
CLOCK IN rising edge to SIGNAL OUTPUT driven high (see Note)
ns
REF
DESCRIPTION
VALUE @5 VOLTS
UNITS
TABLE FOR FIGURE 13. SSRT CLOCK EDGE TO SIGNAL IN / OUT VALID TIMING
MIN
TYP
MAX
40
30
15
VALUE @3.3 VOLTS
MIN
TYP
MAX
40
NOTE:
(1)
Assumes a 50 pf external load. For loading above 50pf, the validity of output signals is delayed by an additional 0.14
ns/pf typ, 0.28ns/pf max.
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