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| 型號(hào)： | BU-61865G3-262 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| 封裝： | 25.40 X 25.40 MM, 3.94 MM HEIGHT, CERAMIC, FP-72 |
| 文件頁(yè)數(shù)： | 38/60頁(yè) |
| 文件大?。?/td> | 700K |
| 代理商： | BU-61865G3-262 |
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43
Data Device Corporation
www.ddc-web.com
BU-6174X/6184X/6186X
Rev. C
16-bit bi-directional data bus. This bus interfaces the host processor to the Enhanced Mini-ACE's internal
registers and internal RAM. In addition, in transparent mode, this bus allows data transfers to take place
between the internal protocol/memory management logic and up to 64K x 16 of external RAM. Most of the
time, the outputs for D15 through D0 are in the high impedance state. They drive outward in the buffered or
transparent mode when the host CPU reads the internal RAM or registers.
Also, in the transparent mode, D15-D0 will drive outward (towards the host) when the protocol/management
logic is accessing (either reading or writing) internal RAM, or writing to external RAM. In the transparent
mode, D15-D0 drives inward when the CPU writes internal registers or RAM, or when the protocol/memory
management logic reads external RAM.
D10
54
D9
51
D8
46
D7
47
D6
36
D5
45
D4
39
D3
44
D2
43
D1
38
D0 (LSB)
42
D15 (MSB)
53
D14
50
D13
48
D12
49
D11
52
TABLE 49. DATA BUS
SIGNAL NAME
DESCRIPTION
BU-6186XFX/GX
BU-6184XFX/GX
BU-6174XFX/GX
PIN
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| BU-61865G3-560K | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| BU-61865G3-560Z | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| BU-61865G3-652S | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| BU-61865G3-672Y | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
| BU-61865G3-692 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72 |
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