參數(shù)資料
型號: BU-61865G3-692
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP72
封裝: 25.40 X 25.40 MM, 3.94 MM HEIGHT, CERAMIC, FP-72
文件頁數(shù): 23/60頁
文件大小: 700K
代理商: BU-61865G3-692
3
Data Device Corporation
www.ddc-web.com
BU-6174X/6184X/6186X
Rev. C
V
mA
5.5
3.6
5.25
180
285
390
600
180
296
412
645
120
225
330
540
40
120
236
352
585
40
160
265
370
580
160
276
392
625
100
205
310
520
40
100
216
332
565
40
4.5
3.0
4.75
POWER SUPPLY REQUIREMENTS
Voltages/Tolerances
! +5V (RAM for 61864(5),
Logic for BU-61XX5) (Note 12)
! +3.3V (Logic for BU-61XX3/4)
(Note 12)
! +5V (Ch. A, Ch. B)
Current Drain (Total Hybrid)
! BU-61865XX-XX0
+5V (Logic, RAM, Ch. A, Ch. B)
Idle
25% Transmitter Duty Cycle
50% Transmitter Duty Cycle
100% Transmitter Duty Cycle
! BU-61865X3-XX2
+5V (Logic, RAM, Ch. A, Ch. B)
Idle
25% Transmitter Duty Cycle
50% Transmitter Duty Cycle
100% Transmitter Duty Cycle
! BU-61864XX-XX0
+5V (RAM, Ch. A, Ch. B)
Idle
25% Transmitter Duty Cycle
50% Transmitter Duty Cycle
100% Transmitter Duty Cycle
3.3V Logic
! BU-61864X3-XX2
+5V (RAM, Ch. A, Ch. B)
Idle
25% Transmitter Duty Cycle
50% Transmitter Duty Cycle
100% Transmitter Duty Cycle
3.3V Logic
! BU-61745XX-XX0. BU-61845XX-XX0
+5V (Logic, RAM, Ch. A, Ch. B)
Idle
25% Transmitter Duty Cycle
50% Transmitter Duty Cycle
100% Transmitter Duty Cycle
! BU-61745X3-XX2. BU-61845X3-XX2
+5V (Logic, RAM, Ch. A, Ch. B)
Idle
25% Transmitter Duty Cycle
50% Transmitter Duty Cycle
100% Transmitter Duty Cycle
! BU-61743XX-XX0, BU-61843XX-XX0
+5V (Ch. A, Ch. B)
Idle
25% Transmitter Duty Cycle
50% Transmitter Duty Cycle
100% Transmitter Duty Cycle
3.3V Logic
! BU-61743X3-XX2, BU-61843X3-XX2
+5V (Ch. A, Ch. B)
Idle
25% Transmitter Duty Cycle
50% Transmitter Duty Cycle
100% Transmitter Duty Cycle
3.3V Logic
UNITS
MAX
TYP
MIN
PARAMETER
TABLE 1. ENHANCED MINI-ACE SERIES SPECIFICATIONS
(CONT.)
5.0
3.3
5.0
V
A
V
mA
pF
0.7
0.2Vcc
10
-50
10
-33
-50
-33
10
0.4
-3.4
50
2.1
0.8Vcc
0.4
1.0
-10
-350
-10
-350
-10
2.4
3.4
LOGIC
VIH
All signals except CLK_IN
CLK_IN
VIL
All signals except CLK_IN
CLK_IN
Schmidt Hysteresis
All signals except CLK_IN
CLK_IN
IIH, IIL
All signals except CLK_IN
IIH (Vcc=5.25V, VIN=Vcc)
IIH (Vcc=5.25V, VIN=2.7V)
IIH (Vcc=3.6V, VIN=Vcc)
IIH (Vcc=3.6V, VIN=2.7V)
IIL (Vcc=5.25V, VIN=0.4V)
IIL (Vcc=3.6V, VIN=0.4V)
CLK_IN
IIH
IIL
VOH (Vcc=4.5V, VIH=2.7V,
VIL=0.2V, IOH=max)
VOH (Vcc=3.0V, VIH=2.7V,
VIL=0.2V, IOH=max)
VOL (Vcc=4.5V, VIH=2.7V,
VIL=0.2V, IOL=max)
VOL (Vcc=3.0V, VIH=2.7V,
VIL=0.2V, IOL=max)
IOL
IOH
CI (Input Capacitance)
CIO (Bi-directional signal input
capacitance)
Vp-p
mVp-p
mVp
nsec
9
27
10
250
300
7
20
22
150
250
6
18
20
-250
100
200
TRANSMITTER
Differential Output Voltage
! Direct Coupled Across 35
,
Measured on Bus
! Transformer Coupled Across
70
, Measured on Bus
(BU-61XXXXX-XX0,
BU-61XXXXX-XX2) (Note 13)
Output Noise, Differential (Direct
Coupled)
Output Offset Voltage, Transformer
Coupled Across 70 ohms
Rise/Fall Time
(BU-61XXXX3,
BU-61XXXX4)
k
pF
Vp-p
Vpeak
5
0.860
10
2.5
0.200
RECEIVER
Differential Input Resistance
(Notes 1-6)
Differential Input Capacitance
(Notes 1-6)
Threshold Voltage, Transformer
Coupled, Measured on Stub
Common Mode Voltage (Note 7)
V
6.0
7.0
6.0
-0.3
ABSOLUTE MAXIMUM RATING
Supply Voltage
! Logic +5V or +3.3V
! RAM +5V
! Transceiver +5V (Note 12)
Logic
! Voltage Input Range for +5V
Logic (BU-61XX5)
! Voltage Input Range for +3.3V
Logic (BU-61XX3/4)
UNITS
MAX
TYP
MIN
PARAMETER
TABLE 1. ENHANCED MINI-ACE SERIES SPECIFICATIONS
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