參數(shù)資料
型號: BU-6486NEW
英文描述: MIL-STD-1553 Components |Mini-ACE? Mark3
中文描述: 符合MIL - STD - 1553模塊|迷你ACE論壇? Mark3
文件頁數(shù): 2/60頁
文件大?。?/td> 410K
代理商: BU-6486NEW
2
D
w
B
C
FIGURE 1. MINI-ACE MARK3 BLOCK DIAGRAM
TRANSCEIVER
A
CH. A
TRANSCEIVER
B
CH. B
DUAL
ENCODER/DECODER,
MULTIPROTOCOL
AND
MEMORY
MANAGEMENT
RT ADDRESS
SHARED
RAM
(1)
ADDRESS BUS
PROCESSOR
AND
MEMORY
INTERFACE
LOGIC
DATA BUS
D15-D0
A15-A0
DATA
BUFFERS
ADDRESS
BUFFERS
PROCESSOR
DATA BUS
PROCESSOR
ADDRESS BUS
MISCELLANEOUS
INCMD/MCRST
CLK_IN, TAG_CLK,
MSTCLR, SSFLAG/EXT_TRG, TX-INH_A, TX-INH_B,
SLEEPIN/UPADDREN
RTAD4-RTAD0, RTADP, RTADD_LAT
TRANSPARENT/BUFFERED, STRBD, SELECT,
RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,
MSB/LSB/DTGRT
IOEN, READYD
ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,
8/16-BIT/DTREQ, POLARITY_SEL/DTACK
INT
PROCESSOR
AND
MEMORY
CONTROL
INTERRUPT
REQUEST
TX/RX_A
TX/RX_A
TX/RX_B
TX/RX_B
NOTE 1: See Ordering Information for Available Memory Options.
NOTE 2: Transformer-coupled ratio shown.
(1:2.7)
(Note 2)
(1:2.7)
(Note 2)
+3.3V
+3.3V
+3.3V
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