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參數(shù)資料
| 型號： | BU-65566G22N |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), MIL-STD-1553 CONTROLLER, XMA64 |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 502K |
| 代理商： | BU-65566G22N |
6
Data Device Corporation
www.ddc-web.com
BU-65566
F-04/06-0
BUS CONTROLLER (BC) ARCHITECTURE
The BC functionality for the Enhanced Mini-ACE includes two
separate architectures: (1) the older, legacy mode, which pro-
vides complete compatibility with the previous ACE and Mini-
ACE (Plus) generation products; and (2) the newer, Enhanced
BC mode. The Enhanced BC mode offers several new powerful
architectural features. This includes the incorporation of a highly
autonomous BC message sequence control engine, which great-
ly serves to offload the operation of the host CPU. This can be a
critical factor in embedded systems with real time requirements.
The Enhanced BC's message sequence control engine provides
a high degree of flexibility for implementing major and minor
frame scheduling; capabilities for inserting asynchronous mes-
sages in the middle of a frame; to separate 1553 message data
from control/status data for the purpose of implementing double
buffering and performing bulk data transfers; for implementing
message retry schemes, including the capability for automatic
bus channel switchover for failed messages; and for reporting
various conditions to the host processor by means of user-
defined interrupts and a general purpose queue.
In both the legacy and Enhanced BC modes, the Enhanced Mini-
ACE BC implements all MIL-STD-1553B message formats. The
BC Control Word allows 1553 message format, 1553A/B type
RT, bus channel, self-test, and Status Word masking to be spec-
ified on an individual message basis. In addition, automatic
retries and/or interrupt requests may be enabled or disabled for
individual messages.
When using the Enhanced Mini-ACE API library the user can
easily input options to one of the aceBCMsgCreate() functions
listed in the Enhanced Mini-ACE Runtime Library Software
Manual to control the operations described above. The BC per-
forms all error checking required by MIL-STD-1553B. This
includes validation of response time, sync type, sync encoding,
Manchester II encoding, parity, bit count, word count, Status Word
RT Address field, and various RT-to-RT transfer errors. The
Enhanced Mini-ACE BC response timeout value is programmable
with choices of 18, 22, 50, and 130 ms by using the
aceSetRespTimeOut() library function. The longer response time-
out values allow for operation over long buses and/or use of the
repeaters. In the Enhanced BC mode, there is no explicit limit to
the number of messages that may be processed in a frame.
When using the Enhanced Mini-ACE API library this is all easily
implemented by calling the BC set of functions, which allows the
user to easily set up BC operation. The library abstracts all mem-
ory accesses, register accesses, and individual bit operations to
make programming the Enhanced Mini-ACE simple.
BC GENERAL PURPOSE QUEUE
The Enhanced Mini-ACE BC allows for the creation of a general
purpose queue. This data structure provides a means for the
message sequence processor to convey information to the BC
host. The BC op code repertoire provides mechanisms to push
various items on this queue. These include the contents of the
Time Tag Register, the Block Status Word for the most recent
message, an immediate data value, or the contents of a speci-
fied memory address. The Enhanced Mini-ACE C API library
uses the general-purpose queue to provide for timing messages
and frame repetitions.
BC HOST BUFFER
The Enhanced Mini-ACE API library software allows for the cre-
ation of a circular software host buffer. The software will auto-
matically log all messages and data processed by the BC to the
host buffer. The user can poll the host buffer with the
aceBCGetHBufMsgsRaw() function to read the contents of the
host buffer or with the aceBCGetHBufMsgDecoded() function to
read one message at a time. This function will read one message
from the host buffer and parse all relevant information into a
library structure to separate the command word, data words, and
all other parts of a 1553 message. This allows the user to easily
read a message without parsing the individual bits.
REMOTE TERMINAL (RT) ARCHITECTURE
The Enhanced Mini-ACE RT architecture provides multiprotocol
support, with full compliance to all of the commonly used data
bus standards, including MIL-STD-1553A, MIL-STD-1553B,
Notice 2, STANAG 3838, General Dynamics 16PP303, and
McAir A3818, A5232, and A5690. For the Enhanced Mini-ACE
RT mode, there is programmable flexibility enabling the RT to be
configured to fulfill any set of system requirements. This
includes the capability to meet the MIL-STD-1553A response
time requirement of 2 to 5 s, and multiple options for mode
code subaddresses, mode codes, RT status word, and RT BIT
word.
The Enhanced Mini-ACE RT protocol design implements all of
the MIL-STD-1553B message formats and dual redundant mode
codes. The design has passed validation testing for MIL-STD-
1553B compliance. The Enhanced Mini-ACE RT performs com-
prehensive error checking, word and format validation, and
checks for various RT-to-RT transfer errors. One of the main fea-
tures of the Enhanced Mini-ACE RT is its choice of memory
management options. These include single buffering by subad-
dress, double buffering for individual receive subaddresses, cir-
cular buffering by individual subaddresses, and global circular
buffering for multiple (or all) subaddresses.
Other features of the Enhanced Mini-ACE RT include a set of
interrupt conditions, an interrupt status queue with filtering based
on valid and/or invalid messages, internal command illegaliza-
tion, programmable busy by subaddress, multiple options on
time tagging, and an "auto-boot" feature which allows the RT to
initialize as an online RT with the busy bit set following power
turn-on.
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