參數(shù)資料
型號: BU6521KV-E2
廠商: Rohm Semiconductor
文件頁數(shù): 5/21頁
文件大小: 0K
描述: IC VIDEO ENCODER AIE 48VQFPC
標準包裝: 1,500
類型: 視頻編碼器
應(yīng)用: 照相機
電壓 - 電源,模擬: 2.7 V ~ 3.6 V
電壓 - 電源,數(shù)字: 1.5 V,3.3 V
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-VQFPC
包裝: 帶卷 (TR)
Technical Note
13/18
BU6520KV,BU6521KV
www.rohm.com
2010.02 - Rev.C
2010 ROHM Co., Ltd. All rights reserved.
2. The 2 line formula serial interface format
Slave address is 70h.
The sub-address is incremented automatically when accessing it (read / write) continuously 2 times or more.
S = START condition
A(S) = Acknowledge by slave
NA(S) = Not acknowledge by slave
P = STOP condition
A(M) = Acknowledge by master
NA(M) = Not acknowledge by master
Write sequence
S
Slave address
(70h)
W
(0)
A(S)
Sub address
A(S)
Data
A(S)
Data
A(S)
Data
A(S)/
NA(S)
P
Read sequence
S
Slave address
(70h)
W
(0)
A(S)
Sub address
S
Slave address
(70h)
A(M)/
NA(M)
P
A(S)
R
(1)
A(S)
Data
A(M)
Data
Fig.12 2-line serial interface format
3. SPI-bus format
Fig.13 SPI-bus interface wave form
* REG_WPB, REG_SCEB, SWDATA, and SRDATA in figure are the register names, and the each function is as follows.
REG_WPB
:Set WP Terminal logic. Register value is output directly.
REG_SCEB :Set SCEB Terminal logic. Register value is output directly.
SWDATA[7:0]:Write data to EEPROM. Transfers MSB the first.
SRDATA[7:0] :Read data from EEPROM. Converts MSB the first.
The SCK clock frequency is as follows.
SCK frequency =
CAMCKI frequency ÷ 2
(SPIPREDIV+1) ÷ (SPIDIV+1)
Register range : SPIPREDIV = 0 to 7, SPIDIV = 0 to 31
When CAMCKI is 27MHz, SCK becomes 3.3 kHz from 13.5 MHz.
WPB
H'/'L' level is set by the REG_WPB register.
SCEB
H'/'L' level is set by the REG_SCEB register.
SCK
SDO
W7W6
W5
W4
W3W2W1W0
SDI
R7R6
R5
R4R3R2R1R0
The data written in
the SWDATA register is set.
It is possible to read it
from the SRDATA register.
Fig.10
SDI
SCLK
データ送受信波形
1-7
8
S
1-7
8
9
STOP
condition
9
1-7
8
9
P
ACK
Sub address
Data
ACK
Slave
address
R/W
START
condition
Fig.11 Waveform of date transmission part
SDA
SDC
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