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參數(shù)資料
| 型號： | BW1223X |
| 英文描述： | Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6 V tolerant inputs and outputs |
| 中文描述： | BW1223X 8位40MSPS模數(shù)轉(zhuǎn)換器BW1223X |數(shù)據(jù)資料 |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 140K |
| 代理商： | BW1223X |
BW1223X
8BIT 40MSPS ADC
SEC ASIC
ANALOG
DELAY
TIMING
DIAGRAM
AIN
CLK
DO
DO (-2)
AIN(1)
AIN(2)
AIN(3)
AIN(4)
t
d
DO (-1)
DO (0)
DO (1)
2.5 CLK PIPELINE DELAY
AIN(0)
DO (2)
5 / 11
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