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參數(shù)資料
| 型號： | C-15-2500-FDFB-SLC4 |
| 元件分類： | 光收發(fā) |
| 英文描述： | FIBER OPTIC TRANSCEIVER, 1500-1580nm, 2488Mbps(Tx), 2488Mbps(Rx), BOARD/PANEL MOUNT, LC CONNECTOR |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 938K |
| 代理商： | C-15-2500-FDFB-SLC4 |
4
2.5 Gbps Single Mode SFF LC Transceiver
C-1X-2500(C)-FDFB-SLC4
20550 Nordhoff St. Chatsworth, CA 91311 tel: 818.773.9044 fax: 818.576.9486
9F, No 81, Shui Lee Rd. Hsinchu, Taiwan, R.O.C. tel: 886.3.5169222 fax: 886.3.5169213
LUMNDS814-Apr2605
rev. A.0
LUMINENTOIC.COM
Recommended Circuit Schematic
Inputs to the C-1X-2500(C)-FDFB-SLC4 series transmitters are AC coupled and internally terminated through 50 ohms to AC ground.
These transceivers can operate with LVPECL or CML logic levels. The input signal must have at least a 200 mV peak to (single ended) signal
swing. Output from the receiver section of the module is also AC coupled and is expected to drive into 50 ohm load. Different termination
strategies may be required depending on the particular Serializer / Deserializer chip set used.
The C-1X-2500(C)-FDFB-SLC4 series product family are designed with AC coupled data inputs and outputs to provide the following
advantages:
■
Close positioning of SERDES with respect to transceiver; allows for shorter line lengths and at gigabit speeds reduces EMI.
■
Minimum number of external components.
■
Internal termination reduces the potential for unterminated stubs which would otherwise increase jitter and reduce transmission margin.
Figure 1 & Figure 2 illustrates the recommended transmit and receive data line trminations for SERDES with CML and LVPECL Inputs / Outputs
respectively.
TTL logic level
Serializer / De-Serializer
with CML lnputs/Outputs
Figure 1.Recommended TRANSMIT and RECEIVE Data Terminations for SERDES with CML I/Os.
Note 1. Consult SERDES manufacturer’s data sheet and application data for appropriate receiver input biasing network.
Some deserializer inputs are internally terminated and may not need external termination resistors.
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