- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378429 > C167CS-4R (INFINEON TECHNOLOGIES AG) BOARD INTERFACE KGZ/GMS 0-100% PDF資料下載
參數(shù)資料
| 型號： | C167CS-4R |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | BOARD INTERFACE KGZ/GMS 0-100% |
| 中文描述： | 16位單片機(jī) |
| 文件頁數(shù)： | 61/80頁 |
| 文件大?。?/td> | 1151K |
| 代理商： | C167CS-4R |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁當(dāng)前第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
C167CS-4R
C167CS-L
Data Sheet
57
V2.0, 2000-06
The timings listed in the AC Characteristics that refer to TCLs therefore must be
calculated using the minimum TCL that is possible under the respective circumstances.
The actual minimum value for TCL depends on the jitter of the PLL. As the PLL is
constantly adjusting its output frequency so it corresponds to the applied input frequency
(crystal or oscillator) the relative deviation for periods of more than one TCL is lower than
for one single TCL (see formula and
Figure 12
).
For a period of
N
×
TCL the minimum value is computed using the corresponding
deviation D
N
:
(
N
×
TCL)
min
=
N
×
TCL
NOM
– D
N
; D
N
[ns] =
±
(13.3 +
N
×
6.3)/
f
CPU
[MHz],
where
N
= number of consecutive TCLs and 1
≤
N
≤
40.
So for a period of 3 TCLs @ 25 MHz (i.e.
N
= 3): D
3
= (13.3 +
3
×
6.3)/25 = 1.288 ns,
and (3TCL)
min
= 3TCL
NOM
– 1.288 ns = 58.7 ns (@
f
CPU
= 25 MHz).
This is especially important for bus cycles using waitstates and e.g. for the operation of
timers, serial interfaces, etc. For all slower operations and longer periods (e.g. pulse train
generation or measurement, lower baudrates, etc.) the deviation caused by the PLL jitter
is neglectible.
Note: For all periods longer than 40 TCL the N=40 value can be used (see
Figure 12
).
Figure 12
Approximated Maximum Accumulated PLL Jitter
±1
±10
1
5
10
20
D
N
±20
±26.5
ns
±30
40 and 10 MHz
This approximated formula is valid for
1
N
33 MHz.
CPU
f
25 MHz
33 MHz
40
MCD04413
N
16 MHz
20 MHz
10 MHz
Max. jitter
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| C167CS-L | 16-Bit Single-Chip Microcontroller |
| C167CS-L16M3V | 16-Bi t Single-Chip Microcontroller |
| C167CS-XC | 16-Bit Single-Chip Microcontroller Bare Die Delivery |
| C167SR | 16-Bit CMOS Single-Chip Microcontroller |
| C167 | High-Performance CMOS 16-Bit Microcontrollers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| C167CS-4R_01 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller |
| C167CS-4RM | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller |
| C167CS-L | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bit Single-Chip Microcontroller |
| C167CS-L16M3V | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16-Bi t Single-Chip Microcontroller |
| C167CSL16M3VCAFXQLA1 | 制造商:Infineon Technologies AG 功能描述:MCU 16-bit C166 CISC/RISC ROMLess 3.3V 144-Pin MQFP |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。