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參數(shù)資料
| 型號： | C504 |
| 廠商： | SIEMENS AG |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit CMOS Microcontroller |
| 中文描述： | 8位CMOS微控制器 |
| 文件頁數(shù)： | 30/49頁 |
| 文件大?。?/td> | 962K |
| 代理商： | C504 |
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C504
Semiconductor Group
30
A low-priority interrupt can itself be interrupted by a high-priority interrupt, but not by another low-
priority interrupt. A high-priority interrupt cannot be interrupted by any other interrupt source.
If two requests of different priority level are received simultaneously, the request of higher priority is
serviced. If requests of the same priority are received simultaneously, an internal polling sequence
determines which request is serviced. Thus within each priority level there is a second priority
structure determined by the polling sequence as shown in
table 9
.
Table 8
Interrupt Vector Addresses
Request Flags
Interrupt Source
Vector Address
IE0
TF0
IE1
TF1
RI + TI
TF2 + EXF2
IADC
IE2
TRF, BCERR
CT2P
CC0F-CC2F, CC0R-CC2R
CT1FP, CT1FC
–
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial port interrupt
Timer 2 interrupt
A/D converter interrupt
External interrupt 2
CAPCOM emergency interrupt
Compare timer 2 interrupt
Capture / compare match interrupt
Compare timer 1 interrupt
Power-down interrupt
0003H
000BH
0013H
001BH
0023H
002BH
0043H
004BH
0053H
005BH
0063H
006BH
007BH
Table 9
Interrupt Source Structure
Interrupt Source
High Priority
Priority
External Interrupt 0
Timer 0 Interrupt
External Interrupt 1
Timer 1 Interrupt
Serial Channel
Timer 2 Interrupt
A/D Converter
External Interrupt 2
CCU Emergency Interrupt
Compare Timer 2 Interrupt
Capture / Compare Match Interrupt
Compare Timer 1 Interrupt
High h
Low
Low Priority
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