參數(shù)資料
型號: C8051F000R
廠商: Silicon Laboratories Inc
文件頁數(shù): 62/171頁
文件大小: 0K
描述: IC 8051 MCU 32K FLASH 64TQFP
標(biāo)準(zhǔn)包裝: 1
系列: C8051F00x
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: SMBus(2 線/I²C),SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 剪切帶 (CT)
其它名稱: 336-1000-1
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
20. PROGRAMMABLE COUNTER ARRAY
The Programmable Counter Array (PCA) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer and five
16-bit capture/compare modules. Each capture/compare module has its own associated I/O line (CEXn) which is
routed through the Crossbar to Port I/O when enabled (see Section 15.1 for details on configuring the Crossbar).
The counter/timer is driven by a configurable timebase that can select between four inputs as its source: system
clock divided by twelve, system clock divided by four, Timer 0 overflow, or an external clock signal on the ECI
line. The PCA is configured and controlled through the system controller’s Special Function Registers. The basic
PCA block diagram is shown in Figure 20.1.
Figure 20.1. PCA Block Diagram
16-Bit Counter/Timer
Capture/Compare
Module 1
Capture/Compare
Module 0
Capture/Compare
Module 2
Capture/Compare
Module 3
Capture/Compare
Module 4
CEX1
System
Clock
/4
T0 Overflow
ECI
Crossbar
CEX2
CEX3
CEX4
CEX0
Port I/O
/12
00
01
10
CPS=11
Rev. 1.7
154
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