參數(shù)資料
型號: C8051F002-GQR
廠商: Silicon Laboratories Inc
文件頁數(shù): 83/171頁
文件大?。?/td> 0K
描述: IC 8051 MCU 32K FLASH 32LQFP
產(chǎn)品培訓模塊: Serial Communication Overview
標準包裝: 500
系列: C8051F00x
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: SMBus(2 線/I²C),SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 8
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x12b; D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 32-LQFP
包裝: 帶卷 (TR)
配用: 336-1246-ND - DEV KIT F300/301/302/303/304/305
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
1.8.
Comparators and DACs
The C8051F000 MCU Family has two 12-bit DACs and two comparators on chip (the second comparator, CP1, is
not bonded out on the F002, F007, F012, and F017). The MCU data and control interface to each comparator and
DAC is via the Special Function Registers. The MCU can place any DAC or comparator in low power shutdown
mode.
The comparators have software programmable hysteresis. Each comparator can generate an interrupt on its rising
edge, falling edge, or both. The comparators’ output state can also be polled in software. These interrupts are
capable of waking up the MCU from idle mode. The comparator outputs can be programmed to appear on the Port
I/O pins via the Crossbar.
The DACs are voltage output mode and use the same voltage reference as the ADC. They are especially useful as
references for the comparators or offsets for the differential inputs of the ADC.
Figure 1.11. Comparator and DAC Diagram
SFR's
(Data
and
Cntrl)
CP1
CP1+
CP1-
DAC0
DAC1
REF
CP0
CP0+
CP0-
CIP-51
and
Interrupt
Handler
CROSSBAR
CP1
CP0
(Port I/O)
+
-
CP0
+
-
CP1
(not bonded out on
F002, F007, F012, and
F017)
19
Rev. 1.7
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