參數(shù)資料
型號(hào)： C8051F006R
廠商： Silicon Laboratories Inc
文件頁數(shù)： 94/171頁
文件大小： 0K
描述： IC 8051 MCU 32K FLASH 48TQFP
標(biāo)準(zhǔn)包裝： 1
系列： C8051F00x
核心處理器： 8051
芯體尺寸： 8-位
速度： 25MHz
連通性： SMBus（2 線/I²C），SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 16
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 2x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-TQFP
包裝： 剪切帶 (CT)
其它名稱： 336-1004-1
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
5.
ADC (12-Bit, C8051F000/1/2/5/6/7 Only)
The ADC subsystem for the C8051F000/1/2/5/6/7 consists of a 9-channel, configurable analog multiplexer
(AMUX), a programmable gain amplifier (PGA), and a 100ksps, 12-bit successive-approximation-register ADC
with integrated track-and-hold and programmable window detector (see block diagram in Figure 5.1). The AMUX,
PGA, Data Conversion Modes, and Window Detector are all configurable under software control via the Special
Function Register’s shown in Figure 5.1. The ADC subsystem (ADC, track-and-hold and PGA) is enabled only
when the ADCEN bit in the ADC Control register (ADC0CN, Figure 5.7) is set to 1. The ADC subsystem is in low
power shutdown when this bit is 0. The Bias Enable bit (BIASE) in the REF0CN register (see Figure 9.2) must be
set to 1 in order to supply bias to the ADC.
Figure 5.1. 12-Bit ADC Functional Block Diagram
12-Bit
SAR
ADC
REF
+
-
AV+
TEMP
SENSOR
12
+
-
+
-
+
-
9-to-1
AMUX
(SE or
DIFF)
AV+
COMB
LOGIC
24
12
ADWINT
ADCEN
SYSCLK
+
-
X
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
TMR3 OV
T2 OV
CNVSTR
ADBUSY(w)
Conver
si
on
St
ar
t
AGND
AMX0CF
AI
N01I
C
AI
N23I
C
AI
N45I
C
AI
N67I
C
AMX0SL
AMXAD0
AMXAD1
AMXAD2
AMXAD3
ADC0CF
AMPG
N0
AMPG
N1
AMPG
N2
ADCSC0
ADCSC1
ADCSC2
ADC0CN
ADLJ
ST
ADWI
NT
ADSTM0
ADSTM1
ADBUSY
ADCINT
ADCTM
ADCEN
ADC0L
ADC0H
ADC0LTL
ADC0LTH
ADC0GTL
ADC0GTH
5.1.
Analog Multiplexer and PGA
Eight of the AMUX channels are available for external measurements while the ninth channel is internally
connected to an on-board temperature sensor (temperature transfer function is shown in Figure 5.3). Note that the
PGA gain is applied to the temperature sensor reading. AMUX input pairs can be programmed to operate in either
the differential or single-ended mode. This allows the user to select the best measurement technique for each input
channel, and even accommodates mode changes “on-the-fly”. The AMUX defaults to all single-ended inputs upon
reset. There are two registers associated with the AMUX: the Channel Selection register AMX0SL (Figure 5.5),
and the Configuration register AMX0CF (Figure 5.4). The table in Figure 5.5 shows AMUX functionality by
channel for each possible configuration. The PGA amplifies the AMUX output signal by an amount determined by
the AMPGN2-0 bits in the ADC Configuration register, ADC0CF (Figure 5.6).
The PGA can be software-
programmed for gains of 0.5, 1, 2, 4, 8 or 16. It defaults to unity gain on reset.
29
Rev. 1.7
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C8051F007-GQ 功能描述:8位微控制器 -MCU 32KB 12ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F007-GQR 功能描述:8位微控制器 -MCU 32KB 12ADC 32Pin MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F007R 功能描述:8位微控制器 -MCU C +-12Bit 48Pin RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F007-W 制造商:Silicon Laboratories Inc 功能描述:
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