參數(shù)資料
型號: C8051F019
廠商: Silicon Laboratories Inc
文件頁數(shù): 146/154頁
文件大?。?/td> 0K
描述: IC 8051 MCU 16K FLASH 48TQFP
標(biāo)準(zhǔn)包裝: 250
系列: C8051F018
核心處理器: 8051
芯體尺寸: 8-位
速度: 25MHz
連通性: SMBus(2 線/I²C),SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-TQFP
包裝: 托盤
C8051F018
C8051F019
Figure 13.5. XBR2: Port I/O CrossBar Register 2
R/W
Reset Value
WEAKPUD
XBARE
-
CNVSTE
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
0xE3
Bit7:
WEAKPUD: Port I/O Weak Pull-up Disable Bit
0: Weak Pull-ups Enabled (except for Ports whose I/O are configured as push-pull)
1: Weak Pull-ups Disabled
Bit6:
XBARE: Crossbar Enable Bit
0: Crossbar Disabled
1: Crossbar Enabled
Bits5-1: UNUSED. Read = 00000b, Write = don’t care.
Bit0:
CNVSTE: ADC Convert Start Input Enable Bit
0: CNVSTR unavailable at Port pin.
1: CNVSTR routed to Port Pin.
Example Usage of XBR0, XBR1, XBR2:
When selected, the digital resources fill the Port I/O pins in order (top to bottom as shown in
The MCUs have a wide array of digital resources, which are available through four digital I/O
ports, P0, P1, P2 and P3. Each of the pins on Ports 0, 1, and 2 can be defined as either its
corresponding port I/O or one of the internal digital resources assigned as shown in Figure 13.1.
The designer has complete control over which functions are assigned, limited only by the
number of physical I/O pins available on the selected package (the C8051F018 has all four ports
pinned out, and the C8051F019 has P0 and P1). This resource assignment flexibility is achieved
through the use of a Priority CrossBar Decoder. (Note that the state of a Port I/O pin can always
be read in the corresponding Port latch regardless of the Crossbar settings).
The CrossBar assigns the selected internal digital resources to the I/O pins based on the Priority
91
Rev. 1.2
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