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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | C8051F047 |
| 寤犲晢锛� | Silicon Laboratories Inc |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 145/328闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC 8051 MCU 32K FLASH 64TQFP |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 100 |
| 绯诲垪锛� | C8051F04x |
| 鏍稿績铏曠悊鍣細 | 8051 |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 25MHz |
| 閫ｉ€氭€э細 | CAN锛孍BI/EMI锛孲MBus锛�2 绶�/I²C锛�锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯(c猫)/寰�(f霉)浣嶏紝POR锛孭WM锛屾韩搴﹀偝鎰熷櫒锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 32 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 32KB锛�32K x 8锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 4.25K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 2.7 V ~ 3.6 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 13x10b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 64-TQFP |
| 鍖呰锛� | 鎵樼洡 |
| 鍏跺畠鍚嶇ū锛� | 336-1159 |
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C8051F040/1/2/3/4/5/6/7
Rev. 1.5
229
18.1.1. CAN Controller Timing
The CAN controller鈥檚 system clock (fsys) is derived from the CIP-51 system clock (SYSCLK). Note that an
external oscillator (such as a quartz crystal) is typically required due to the high accuracy requirements for
CAN communication. Refer to Section 鈥�4.10.4 Oscillator Tolerance Range鈥� in the Bosch CAN User鈥檚 Guide
for further information regarding this topic.
18.1.2. Example Timing Calculation for 1 Mbit/Sec Communication
This example shows how to configure the CAN contoller timing parameters for a 1 Mbit/Sec bit rate.
Table 18.1 shows timing-related system parameters needed for the calculation.
Each bit transmitted on a CAN network has 4 segments (Sync_Seg, Prop_Seg, Phase_Seg1, and
Phase_Seg2), as shown in Figure 18.3. The sum of these segments determines the CAN bit time (1/bit
rate). In this example, the desired bit rate is 1 Mbit/sec; therefore, the desired bit time is 1000 ns.
Figure 18.3. Four Segments of a CAN Bit Time
Table 18.1. Background System Information
Parameter
Value
Description
CIP-51 system clock (SYSCLK)
22.1184 MHz
External oscillator in 鈥楥rystal Oscillator Mode鈥�. A
22.1184 MHz quartz crystal is connected between
XTAL1 and XTAL2.
CAN Controller system clock
(fsys)
22.1184 MHz
Derived from SYSCLK.
CAN clock period (tsys)
45.211 ns
Derived from 1/fsys.
CAN time quantum (tq)
45.211 ns
Derived from tsys x BRP
1,2
CAN bus length
10 m
5 ns/m signal delay between CAN nodes.
Propagation delay time3
400 ns
2 x (transceiver loop delay + bus line delay)
Notes:
1. The CAN time quantum (tq) is the smallest unit of time recognized by the CAN contoller. Bit timing parameters
are often specified in integer multiples of the time quantum.
2. The Baud Rate Prescaler (BRP) is defined as the value of the BRP Extension Register plus 1. The BRP
Extension Register has a reset value of 0x0000; the Baud Rate Prescaler has a reset value of 1.
3. Based on an ISO-11898 compliant transceiver. CAN does not specify a physical layer.
Prop_Seg
Phase_Seg1
Phase_Seg2
CAN Bit Time (4 to 25 t
q)
Sync_Seg
1t
q
1 to 8 t
q
1 to 8 t
q
1 to 8 t
q
1t
q
Sample Point
鐩搁棞(gu膩n)PDF璩囨枡 |
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
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| C8051F047R | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 25 MIPS 32KB 10ADC RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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