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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� C8051F349-GM
寤犲晢锛� Silicon Laboratories Inc
鏂囦欢闋佹暩(sh霉)锛� 195/276闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC 8051 MCU 32K FLASH MEM 32-QFN
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Serial Communication Overview
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 73
绯诲垪锛� C8051F34x
鏍稿績铏曠悊鍣細 8051
鑺珨灏哄锛� 8-浣�
閫熷害锛� 25MHz
閫i€氭€э細 SMBus锛�2 绶�/I²C锛�锛孲PI锛孶ART/USART锛孶SB
澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯/寰�(f霉)浣�锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 25
绋嬪簭瀛樺劜鍣ㄥ閲忥細 32KB锛�32K x 8锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 2.25K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.7 V ~ 3.6 V
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 32-VFQFN 瑁搁湶鐒婄洡
鍖呰锛� 绠′欢
閰嶇敤锛� 336-1748-ND - ADAPTER TOOLSTICK FOR C8051F34X
鍏跺畠鍚嶇ū锛� 336-1349-5
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C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
274
Rev. 1.3
DOCUMENT CHANGE LIST
Revision 0.5 to Revision 1.0
Various small text changes.
Updated Flash security behavior.
Revision 1.0 to Revision 1.1
Added two new part numbers C8051F348/9 and made associated changes.
Corrected the entries "24 kHz" and "48 kHz" to "24 MHz" and "48 MHz" in the "Conditions" column of
Table 3.1, "Global DC Electrical Characteristics," on page 38.
Added note to configure external interrupt pin as open-drain with a 鈥�1鈥� in the port latch in Section 9.3.2.
"External Interrupts" on page 96.
Various small text changes.
Updated the figures in Section 15.1. "Priority Crossbar Decoder" and added a new figure to clarify
crossbar capabilities.
Corrected the description of the UNDRUN bit in USB Register Definition 16.19. "EINCSRL: USB0 IN
Endpoint Control Low Byte" on page 198 to clarify that this bit works only in Isochronous Mode.
Corrected the maximum SMBus speed from 1/10th to 1/20th of the system clock in Section 17.
"SMBus" on page 205.
Corrected the descriptions for the following states and the corresponding typical response options in
Table 17.4. "SMBus Status Decoding" on page 221:
- Slave Transmitter (Status Vector: 0101)
- Slave Receiver (Status Vector: 0001)
Corrected the bit location of MSTEN from SPI0CN.6 to SPI0CFG.6 in Section 20.2. "SPI0 Master
Operation" on page 243.
Corrected the description of the WCOL bit in SFR Definition 20.2. "SPI0CN: SPI0 Control" on page
249 to match the description in Section 20.4. "SPI0 Interrupt Sources" on page 245.
- VBUS Detection Input High and Low Voltages
- Dropout Voltage
Updated the package drawings with additional dimensions in Figure 4.2 and Table 4.2, 鈥淭QFP-48
Revision 1.1 to Revision 1.2
Added two new part numbers C8051F34A/B and made associated changes.
Corrected references to locations of T0M and T1M in the SFR definition of TMOD on page 240.
Corrected instances of "8k" to "4k" in the SFR definition of EMI0CF on page 118.
Revision 1.2 to Revision 1.3
Added QFN-32 package.
Revision 1.3 to Revision 1.4
Added C8051F34C and C8051F34D devices.
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鍙冩暩(sh霉)鎻忚堪
C8051F349-GMR 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 25 MIPS 32KB USB MCU RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
C8051F349-GQ 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8-bit 32 KB Flash USB 25 MIPS RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
C8051F349-GQR 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 25 MIPS 32KB USB MCU RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
C8051F34A 鍒堕€犲晢:SILABS 鍒堕€犲晢鍏ㄧū:SILABS 鍔熻兘鎻忚堪:USB DRIVER CUSTOMIZATION
C8051F34A-GM 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 64KB 10ADC 2xUART USB 32Pin MCU RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT