C8051F55x/56x/57x
156
Rev. 1.1
SFR Address = 0x8F; SFR Page = 0x0F
SFR Definition 18.1. CLKSEL: Clock Select
Bit
7
6
5
4
3
2
1
0
Name
CLKSL[1:0]
Type
R
R/W
Reset
0
Bit
Name
Function
7:2
Unused
Read = 000000b; Write = Don’t Care
1:0
CLKSL[1:0] System Clock Source Select Bits.
00: SYSCLK derived from the Internal Oscillator and scaled per the IFCN bits in reg-
ister OSCICN.
01: SYSCLK derived from the External Oscillator circuit.
10: SYSCLK derived from the Clock Multiplier.
11: reserved.