Rev. 1.2
51
C8051F58x/F59x
Table 5.9. ADC0 Electrical Characteristics
VDDA = 1.8 to 2.75 V, –40 to +125 °C, VREF = 1.5 V (REFSL=0) unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
DC Accuracy
Resolution
12
bits
Integral Nonlinearity
—
±0.5
±3
LSB
Differential Nonlinearity
Guaranteed Monotonic
—
±0.5
±1
LSB
Offset Error1
–10
–1.6
10
LSB
Full Scale Error
–20
–4.2
20
LSB
Offset Temperature Coefficient
—
–2
—
ppm/°C
Dynamic performance (10 kHz sine-wave single-ended input, 1 dB below Full Scale, 200 ksps)
Signal-to-Noise Plus Distortion
63
66
—
dB
Total Harmonic Distortion
Up to the 5th harmonic
—
81
—
dB
Spurious-Free Dynamic Range
—
–82
—
dB
Conversion Rate
SAR Conversion Clock
—
3.6
MHz
Conversion Time in SAR Clocks2
13
—
clocks
Track/Hold Acquisition Time3
VDDA >2.0 V
VDDA < 2.0 V
1.5
3.5
—
s
Throughput Rate4
VDDA >2.0 V
—
200
ksps
Analog Inputs
ADC Input Voltage Range5
gain = 1.0 (default)
gain = n
0
—
VREF
VREF / n
V
Absolute Pin Voltage with respect
to GND
0
—
VIO
V
Sampling Capacitance
—
29
—
pF
Input Multiplexer Impedance
—
5
—
k
Power Specifications
Power Supply Current
(VDDA supplied to ADC0)
Operating Mode, 200 ksps
—
1100
1500
A
Burst Mode (Idle)
—
1100
1500
A
Power-On Time
5
—
s
Power Supply Rejection Ratio
—
–60
—
mV/V
Notes:
1. Represents one standard deviation from the mean. Offset and full-scale error can be removed through
calibration.
2. An additional 2 FCLK cycles are required to start and complete a conversion
3. Additional tracking time may be required depending on the output impedance connected to the ADC input.
4. An increase in tracking time will decrease the ADC throughput.