參數(shù)資料
型號(hào): C8051T606ZDB
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 188/188頁(yè)
文件大小: 0K
描述: CARD DAUGHTER QFN10 SOCKET
標(biāo)準(zhǔn)包裝: 1
模塊/板類型: QFN 插口模塊
適用于相關(guān)產(chǎn)品: C8051T606
產(chǎn)品目錄頁(yè)面: 626 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: 336-1663-6-ND - IC 8051 MCU 1.5K-EEPROM 10-QFN
336-1663-2-ND - IC 8051 MCU 1.5K-EEPROM 10-QFN
336-1664-5-ND - IC 8051 MCU 1.5K-EEPROM 10-MSOP
336-1663-1-ND - IC 8051 MCU 1.5K-EEPROM 10-QFN
336-1662-5-ND - IC 8051 MCU 1.5K-EEPROM 11-QFN
其它名稱: 336-1668
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Rev. 1.2
99
C8051T600/1/2/3/4/5/6
20.3. Program Memory CRC
A CRC engine is included on-chip, which provides a means of verifying EPROM contents once the device
has been programmed. The CRC engine is available for EPROM verification even if the device is fully read
and write locked, allowing for verification of code contents at any time.
The CRC engine is operated through the C2 debug and programming interface, and performs 16-bit CRCs
on individual 256-byte blocks of program memory, or a 32-bit CRC the entire memory space. To prevent
hacking and extrapolation of security-locked source code, the CRC engine will only allow CRCs to be per-
formed on contiguous 256-byte blocks beginning on 256-byte boundaries (lowest 8-bits of address are
0x00). For example, the CRC engine can perform a CRC for locations 0x0400 through 0x04FF, but it can-
not perform a CRC for locations 0x0401 through 0x0500, or on block sizes smaller or larger than
256 bytes.
20.3.1. Performing 32-bit CRCs on Full EPROM Content
A 32-bit CRC on the entire EPROM space is initiated by writing to the CRC1 byte over the C2 interface.
The CRC calculation begins at address 0x0000 and ends at the end of user EPROM space. The EPBusy
bit in register C2ADD will be set during the CRC operation, and cleared once the operation is complete.
The 32-bit results will be available in the CRC3-0 registers. CRC3 is the MSB, and CRC0 is the LSB. The
polynomial used for the 32-bit CRC calculation is 0x04C11DB7.
Note: If a 16-bit CRC has been performed since the last device reset, a device reset should be initiated
before performing a 32-bit CRC operation.
20.3.2. Performing 16-bit CRCs on 256-Byte EPROM Blocks
A 16-bit CRC of individual 256-byte blocks of EPROM can be initiated by writing to the CRC0 byte over the
C2 interface. The value written to CRC0 is the high byte of the beginning address for the CRC. For exam-
ple, if CRC0 is written to 0x02, the CRC will be performed on the 256 bytes beginning at address 0x0200,
and ending at address 0x2FF. The EPBusy bit in register C2ADD will be set during the CRC operation, and
cleared once the operation is complete. The 16-bit results will be available in the CRC1-0 registers. CRC1
is the MSB, and CRC0 is the LSB. The polynomial for the 16-bit CRC calculation is 0x1021
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
C8051T606-ZM 功能描述:8位微控制器 -MCU 1.5K OTP EPROM MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051T606-ZMR 功能描述:8位微控制器 -MCU 1.5K OTP EPROM MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051T610DB24 功能描述:仿真器/模擬器 C8051T610 Family Socket Daughtr Board RoHS:否 制造商:Blackhawk 產(chǎn)品:System Trace Emulators 工具用于評(píng)估:C6000, C5000, C2000, OMAP, DAVINCI, SITARA, TMS470, TMS570, ARM 7/9, ARM Cortex A8/R4/M3 用于:XDS560v2
C8051T610DB28 功能描述:子卡和OEM板 C8051T610 Family Socket Daughtr Board RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit
C8051T610DB32 功能描述:子卡和OEM板 C8051T610 Family Socket Daughtr Board RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit