參數(shù)資料
型號(hào): C9531CT
英文描述: ST7262 - LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS, FLASH OR ROM MEMORY, LVD, WDG, 10-BIT ADC, 2 TIMERS, SCI, SPI
中文描述: CPU系統(tǒng)時(shí)鐘發(fā)生器| TSSOP封裝| 28腳|塑料
文件頁數(shù): 7/14頁
文件大小: 176K
代理商: C9531CT
PCIX I/O System Clock Generator With EMI Control Features
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07034 Rev. **
05/02/2001
Page 7 of 14
APPROVED PRODUCT
C9531
Output Clock Frequency Control (Cont.)
thus the frequency selections are controlled by the logic levels present on the device’s S(0,1) pins. If the application
does not use an SMBus interface then hardware frequency selection S(0,1) must be used. If it is desired to control the
output clocks using an SMBus interface, then this bit (Byte 0 Bit 0) must first be set to a low state. After this is done the
device will use the contents of the internal SMBus register Bytes 0 Bits 3 and 4 to control the output clock’s frequency.
Absolute Maximum Ratings
Maximum Power Supply:
Storage Temperature:
Operating Temperature:
Maximum ESD protection
Maximum Input Voltage Relative to VDD: VDD + 0.3V
Maximum Input Voltage Relative to VSS: VSS - 0.3V
5.5
-65oC to + 150oC
0oC to +70oC
2000V
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
field; however, precautions should be taken to avoid
application of any voltage higher than the maximum
rated voltages to this circuit. For proper operation, Vin
and Vout should be constrained to the range:
VSS<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate
logic voltage level (either VSS or VDD).
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