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參數(shù)資料
| 型號： | CA3130 |
| 廠商： | Intersil Corporation |
| 英文描述： | 15MHz, BiMOS Operational Amplifier with MOSFET Input/CMOS Output |
| 中文描述： | 15MHz的，BiMOS運算放大器MOSFET的輸入/ CMOS輸出 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大小： | 654K |
| 代理商： | CA3130 |
3
Electrical Specifications
Typical Values Intended Only for Design Guidance, V
SUPPLY
=
±
7.5V, T
A
= 25
o
C
Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
CA3130,
CA3130A
UNITS
Input Offset Voltage Adjustment Range
10k
Across Terminals 4 and 5 or
4 and 1
±
22
mV
Input Resistance
R
I
1.5
T
Input Capacitance
C
I
f = 1MHz
4.3
pF
Equivalent Input Noise Voltage
e
N
BW = 0.2MHz, R
S
= 1M
(Note 3)
23
μ
V
Open Loop Unity Gain Crossover Frequency
(For Unity Gain Stability
≥
47pF Required.)
f
T
C
C
= 0
15
MHz
C
C
= 47pF
4
MHz
Slew Rate:
SR
C
C
= 0
30
V/
μ
s
Open Loop
Closed Loop
C
C
= 56pF
10
V/
μ
s
Transient Response:
C
C
= 56pF,
C
L
= 25pF,
R
L
= 2k
(Voltage Follower)
0.09
μ
s
Rise Time
t
r
Overshoot
OS
10
%
Settling Time (To <0.1%, V
IN
= 4V
P-P
)
t
S
1.2
μ
s
NOTE:
3. Although a 1M
source is used for this test, the equivalent input noise remains constant for values of R
S
up to 10M
.
Electrical Specifications
Typical Values Intended Only for Design Guidance, V+ = 5V, V- = 0V, T
A
= 25
o
C
Unless Otherwise Specified (Note 4)
PARAMETER
SYMBOL
TEST CONDITIONS
CA3130
CA3130A
UNITS
Input Offset Voltage
V
IO
8
2
mV
Input Offset Current
I
IO
0.1
0.1
pA
Input Current
I
I
2
2
pA
Common-Mode Rejection Ratio
CMRR
80
90
dB
Large-Signal Voltage Gain
A
OL
V
O
= 4V
P-P
, R
L
= 5k
100
100
kV/V
100
100
dB
Common-Mode Input Voltage Range
V
ICR
0 to 2.8
0 to 2.8
V
Supply Current
I+
V
O
= 5V, R
L
=
∞
V
O
= 2.5V, R
L
=
∞
300
300
μ
A
500
500
μ
A
Power Supply Rejection Ratio
V
IO
/
V+
200
200
μ
V/V
NOTE:
4. Operation at 5V is not recommended for temperatures below 25
o
C.
CA3130, CA3130A
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|---|---|
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