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參數(shù)資料
| 型號： | CA3130AMZ96 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 12/17頁 |
| 文件大小： | 0K |
| 描述： | IC OP AMP 15MHZ BIMOS 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 30 V/µs |
| 增益帶寬積： | 15MHz |
| 電流 - 輸入偏壓： | 5pA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 10mA |
| 電流 - 輸出 / 通道： | 45mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 16 V，±2.5 V ~ 8 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
4
Schematic Diagram
Application Information
Circuit Description
Figure 1 is a block diagram of the CA3130 Series CMOS
Operational Amplifiers. The input terminals may be operated
down to 0.5V below the negative supply rail, and the output
can be swung very close to either supply rail in many
applications. Consequently, the CA3130 Series circuits are
ideal for single-supply operation. Three Class A amplifier
stages, having the individual gain capability and current
consumption shown in Figure 1, provide the total gain of the
CA3130. A biasing circuit provides two potentials for
common use in the first and second stages.
Terminal 8 can be used both for phase compensation and to
strobe the output stage into quiescence. When Terminal 8 is
tied to the negative supply rail (Terminal 4) by mechanical or
electrical means, the output potential at Terminal 6
essentially rises to the positive supply-rail potential at
Terminal 7. This condition of essentially zero current drain in
the output stage under the strobed “OFF” condition can only
be achieved when the ohmic load resistance presented to
the amplifier is very high (e.g.,when the amplifier output is
used to drive CMOS digital circuits in Comparator
applications).
Input Stage
The circuit of the CA3130 is shown in the schematic diagram.
It consists of a differential-input stage using PMOS field-effect
transistors (Q6, Q7) working into a mirror-pair of bipolar
transistors (Q9, Q10) functioning as load resistors together
with resistors R3 through R6.
The mirror-pair transistors also function as a differential-to-
single-ended converter to provide base drive to the second-
stage bipolar transistor (Q11). Offset nulling, when desired,
can be effected by connecting a 100,000
potentiometer
across Terminals 1 and 5 and the potentiometer slider arm to
Terminal 4.
3
2
1
8
4
6
7
Q1
Q2
Q4
D1
D2
D3
D4
Q3
Q5
D5
D6
D7
D8
Q9 Q10
Q6
Q7
5
Z1
8.3V
INPUT STAGE
R3
1k
R4
1k
R6
1k
R5
1k
NON-INV.
INPUT
INV.-INPUT
+
-
R1
40k
5k
R2
BIAS CIRCUIT
CURRENT SOURCE FOR
“CURRENT SOURCE
LOAD” FOR Q11
Q6 AND Q7
V+
OUTPUT
STAGE
Q8
Q12
V-
Q11
SECOND
STAGE
OFFSET NULL
COMPENSATION
STROBING
(NOTE 5)
NOTE:
5. Diodes D5 through D8 provide gate-oxide protection for MOSFET input stage.
CA3130, CA3130A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CA3130AS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| CA3130AT | 制造商:HARRIS 功能描述:BIMOS OPERATIONAL AMP 制造商: 功能描述: 制造商:undefined 功能描述: |
| CA3130AT/B | 制造商:Rochester Electronics LLC 功能描述: |
| CA3130BS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CA3130BT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BiMOS Operational Amplifier with MOSFET Input/CMOS Output(617.33 k) |
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