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參數(shù)資料
| 型號： | CA3140AEZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 23/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP BIMOS 4.5MHZ 8DIP |
| 標準包裝： | 50 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 9 V/µs |
| 增益帶寬積： | 4.5MHz |
| 電流 - 輸入偏壓： | 10pA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 4mA |
| 電流 - 輸出 / 通道： | 40mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 36 V，±2 V ~ 18 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1233 (CN2011-ZH PDF) |
9
FN957.10
July 11, 2005
the CA3140 is used as a unity gain voltage follower. This
resistance prevents the possibility of extremely large input
signal transients from forcing a signal through the input
protection network and directly driving the internal constant
current source which could result in positive feedback via the
output terminal. A 3.9k
resistor is sufficient.
The typical input current is on the order of 10pA when the
inputs are centered at nominal device dissipation. As the
output supplies load current, device dissipation will increase,
raising the chip temperature and resulting in increased input
current. Figure 7 shows typical input terminal current versus
ambient temperature for the CA3140.
It is well known that MOSFET devices can exhibit slight
changes in characteristics (for example, small changes in
input offset voltage) due to the application of large
differential input voltages that are sustained over long
periods at elevated temperatures.
Both applied voltage and temperature accelerate these
changes. The process is reversible and offset voltage shifts of
the opposite polarity reverse the offset. Figure 9 shows the
typical offset voltage change as a function of various stress
voltages at the maximum rating of 125oC (for metal can); at
lower temperatures (metal can and plastic), for example, at
85oC, this change in voltage is considerably less. In typical
linear applications, where the differential voltage is small and
symmetrical, these incremental changes are of about the
same magnitude as those encountered in an operational
amplifier employing a bipolar transistor input stage.
FIGURE 6. OPEN LOOP VOLTAGE GAIN AND PHASE vs
FREQUENCY
FIGURE 7. INPUT CURRENT vs TEMPERATURE
FIGURE 8. OUTPUT VOLTAGE SWING CAPABILITY AND COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE
101
103
104
105
106
107
108
FREQUENCY (Hz)
O
PE
N
L
OO
P
V
O
LT
A
G
E
G
AIN
(dB
)
100
80
60
40
20
0
SUPPLY VOLTAGE: VS = ±15V
TA = 25
oC
102
O
PEN
L
OOP
P
H
AS
E
-75
-90
-105
-120
-135
-150
(D
E
G
R
E
ES
)
RL = 2k,
CL = 0pF
RL = 2k,
CL = 100pF
φOL
SUPPLY VOLTAGE: VS = ±15V
TEMPERATURE (oC)
-60
-40
-20
0
20
40
60
80
100
120
140
IN
P
U
T
CURRENT
(
p
A)
1K
100
1
10K
10
SUPPLY VOLTAGE (V+, V-)
0
5
10
15
20
25
-1.5
-2.0
-1.0
-2.5
RL = ∞
+VOUT AT TA = 125
oC
+VOUT AT TA = 25
oC
+VOUT AT TA = -55
oC
+VICR AT TA = 125
oC
+VICR AT TA = 25
oC
+VICR AT TA = -55
oC
-3.0
0
-0.5
INP
U
T
AND
O
UT
P
U
T
V
O
LTA
G
E
EX
C
UR
S
IO
N
S
FR
OM
TERMINAL
7
(V+)
SUPPLY VOLTAGE (V+, V-)
0
5
10
15
20
25
-VICR AT TA = 125
oC
-VICR AT TA = 25
oC
-VICR AT TA = -55
oC
-VOUT FOR
TA = -55
oC to 125oC
INPUT
AN
D
OUTPUT
V
O
L
T
A
G
E
EX
C
URS
ION
S
FR
OM
T
E
RMINAL
4
(V
-)
0
-0.5
0.5
-1.0
-1.5
1.5
1.0
CA3140, CA3140A
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