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參數(shù)資料
| 型號(hào)： | CA3160AE |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | 4MHz, BiMOS Operational Amplifier with MOSFET Input/CMOS Output |
| 中文描述： | OP-AMP, 5000 uV OFFSET-MAX, 4 MHz BAND WIDTH, PDIP8 |
| 文件頁(yè)數(shù)： | 3/17頁(yè) |
| 文件大?。?/td> | 926K |
| 代理商： | CA3160AE |
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3
Block Diagram
Unity Gain Crossover Frequency
f
T
4
4
MHz
Slew Rate
SR
10
10
V/
μ
s
Transient Response
Rise and Fall Time
t
r
C
L
= 25pF, R
L
= 2k
, (Voltage Follower)
0.09
0.09
μ
s
Overshoot
OS
10
10
%
Settling Time
t
S
C
L
= 25pF, R
L
= 2k
, (Voltage Follower)
To <0.1%, V
IN
= 4V
P-P
1.8
1.8
μ
s
Electrical Specifications
For Design Guidance, V
SUPPLY
=
±
7.5V, T
A
= 25
o
C, Unless Otherwise Specified
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
CA3160
CA3160A
UNITS
TYP
TYP
Electrical Specifications
For Design Guidance, V+ = +5V, V- = 0V, T
A
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
CA3160
CA3160A
UNITS
TYP
TYP
Input Offset Voltage
V
IO
6
2
mV
Input Offset Current
I
IO
0.1
0.1
pA
Input Current
I
l
2
2
pA
Common-Mode Rejection Ratio
CMRR
80
90
dB
Large Signal Voltage Gain
A
OL
V
O
= 4V
P-P
, R
L
= 5k
100
100
kV/V
100
100
dB
Common-Mode Input Voltage Range
V
lCR
0 to 2.8
0 to 2.8
V
Supply Current
I+
V
O
= 5V, R
L
=
∞
V
O
= 2.5V, R
L
=
∞
300
300
μ
A
500
500
μ
A
Power Supply Rejection Ratio
PSRR
V
IO
/
V+
200
200
μ
V/V
NOTE:
3. I
CC
typically increases by 1.5mA/MHz during operation.
6
BIAS CKT.
200
μ
A
1.35mA
200
μ
A
7
8mA
(NOTE 4)
0mA
(NOTE 5)
OUTPUT
A
V
≈
30X
A
V
≈
6000X
STROBE
V-
V+
OFFSET
NULL
COMPENSATION
(WHEN DESIRED)
+
-
INPUT
A
V
≈
5X
C
C
NOTES:
4. Total supply voltage (for indicated voltage
gains) = 15V with input terminals biased so
that Terminal 6 potential is +7.5V above
Terminal 4.
5. Total supply voltage (for indicated voltage
gains) = 15V with output terminal driven to
either supply rail.
4
8
1
5
2
3
CA3160, CA3160A
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