- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379728 > CA3224 (Intersil Corporation) Automatic Picture Tube Bias Control Circuit PDF資料下載
參數(shù)資料
| 型號(hào)： | CA3224 |
| 廠商： | Intersil Corporation |
| 英文描述： | Automatic Picture Tube Bias Control Circuit |
| 中文描述： | 自動(dòng)顯像管偏壓控制電路 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 62K |
| 代理商： | CA3224 |
8-56
November 1996
CA3224E
Automatic Picture Tube Bias Control Circuit
Features
Automatic Picture Tube Bias Cutoff Control
Automatic Background Color Balance
Eliminates Grey Scale Adjustments
Compensates for Cathode-to-Heater Leakage
Electrostatic Protection on All Pins
Servo Loop Design
Wide Dynamic Range
Three-Gun Control
Minimal External Components
Description
The CA3224E is an automatic picture tube bias control cir-
cuit used in color TV receiver CRT drive circuits. It is used to
provide dynamic bias control of the grey scale both initially
and over the CRT operating life, compensating for CRT cut-
off changes.
The CA3224E provides automatic continuous control of the
cutoff current in each gun of a three-gun color CRT. From an
input pulse amplitude proportional to the difference between
the desired and the actual CRT cutoff, a gated sample/hold
circuit generates a DC correction voltage which correctly
biases the CRT driver circuit. The sample/hold bias correc-
tion takes place each frame following the vertical blanking.
Figure 1 shows a block diagram of the CA3224E. The func-
tions include three identical servo loop transconductance
amplifiers with a sample/hold switch and buffer amplifier plus
control logic, internal bias and a mode switch.
Pinout
CA3224E
(PDIP)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CA3224E
-40 to 85
22 Ld PDIP
E22.4
1
11
10
9
8
7
6
5
3
2
4
22
12
13
14
15
16
17
18
19
21
20
CHANNEL 1 INPUT
CHANNEL 1 FREQ COMPENSATION
CHANNEL 2 INPUT
CHANNEL 2 FREQ COMPENSATION
CHANNEL 3 INPUT
CHANNEL 3 FREQ COMPENSATION
GROUND
VERTICAL INPUT
HORIZONTAL INPUT
GRID PULSE OUTPUT
CHANNEL 1 HOLD CAP
CHANNEL 2 HOLD CAP
CHANNEL 2 OUTPUT
CHANNEL 3 HOLD CAP
CHANNEL 1 OUTPUT
CHANNEL 3 OUTPUT
V
REF
BYPASS
AUTO BIAS LEVEL ADJUST
AUTO BIAS PULSE OUTPUT
PROGRAM PULSE OUTPUT
GROUND
V
CC
File Number
1553.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CA3224E | Automatic Picture Tube Bias Control Circuit |
| CA3227 | High-Frequency NPN Transistor Array For Low-Power Applications at Frequencies Up to 1.5GHz |
| CA3227E | High-Frequency NPN Transistor Array For Low-Power Applications at Frequencies Up to 1.5GHz |
| CA3227M | High-Frequency NPN Transistor Array For Low-Power Applications at Frequencies Up to 1.5GHz |
| CA3227M96 | High-Frequency NPN Transistor Array For Low-Power Applications at Frequencies Up to 1.5GHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CA3224E | 制造商:Rochester Electronics LLC 功能描述:AUTOMATIC PICTURE TUBE BIAS CIRCUIT, 22 PDIP - Bulk |
| CA3224E WAF | 制造商:Harris Corporation 功能描述: |
| CA3224E_02 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Automatic Picture Tube Bias Control Circuit |
| CA3225M01 | 制造商:Eaton Corporation 功能描述:CA3225 with mtg hardware,Ln/Ld terminals |
| CA3227 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:High-Frequency NPN Transistor Array For Low-Power Applications at Frequencies Up to 1.5GHz |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。