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    參數(shù)資料
    型號(hào): CAT1022LI-28TE13
    元件分類(lèi): EEPROM
    英文描述: The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
    中文描述: 該CAT24FC02是一個(gè)2 KB的EEPROM的國(guó)內(nèi)256個(gè)8位每字舉辦的串行CMOS
    文件頁(yè)數(shù): 1/20頁(yè)
    文件大?。?/td> 149K
    代理商: CAT1022LI-28TE13
    DESCRIPTION
    The CAT1021, CAT1022 and CAT1023 are complete
    memory and supervisory solutions for microcontroller-
    based systems. A 2k-bit serial EEPROM memory and a
    system power supervisor with brown-out protection are
    integrated together in low power CMOS technology.
    Memory interface is via a 400kHz I
    2
    C bus.
    The CAT1021 and CAT1023 provide a precision V
    CC
    sense circuit and two open drain outputs: one (RESET)
    drives high and the other (
    RESET
    ) drives low whenever
    V
    CC
    falls below the reset threshold voltage. The CAT1022
    has only a
    RESET
    output and does not have a Write
    Protect input. The CAT1021 also has a Write Protect
    input (WP). Write operations are disabled if WP is
    connected to a logic high.
    All supervisors have a 1.6 second watchdog timer circuit
    that resets a system to a known state if software or a
    hardware glitch halts or “hangs” the system. For the
    CAT1021 and CAT1022, the watchdog timer monitors
    the SDA signal. The CAT1023 has a separate watchdog
    timer interrupt input pin, WDI.
    CAT1021, CAT1022, CAT1023
    Supervisory Circuits with I
    2
    C Serial 2k-bit CMOS EEPROM, Manual Reset
    and Watchdog Timer
    FEATURES
    Precision power supply voltage monitor
    — 5V, 3.3V and 3V systems
    — Five threshold voltage options
    Watchdog timer
    Active high or low reset
    — Valid reset guaranteed at V
    CC
    = 1 V
    400kHz I
    2
    C bus
    3.0V to 5.5V operation
    Low power CMOS technology
    16-Byte page write buffer
    Built-in inadvertent write protection
    — WP pin (CAT1021)
    1,000,000 Program/Erase cycles
    Manual reset input
    100 year data retention
    8-pin DIP, SOIC, TSSOP, MSOP or TDFN
    (3 x 3 mm foot-print) packages
    — TDFN max height is 0.8mm
    Industrial and extended temperature ranges
    2004 by Catalyst Semiconductor, Inc.
    Characteristics subject to change without notice
    Doc No. 3009, Rev. K
    The power supply monitor and reset circuit protect memory
    and system controllers during power up/down and against
    brownout conditions. Five reset threshold voltages support
    5V, 3.3V and 3V systems. If power supply voltages are out
    of tolerance reset signals become active, preventing the
    system microcontroller, ASIC or peripherals from operating.
    Reset signals become inactive typically 200 ms after the
    supply voltage exceeds the reset threshold level. With both
    active high and low reset signals, interface to microcontrollers
    and other ICs is simple. In addition, the
    RESET
    pin or a
    separate input,
    MR
    , can be used as an input for push-button
    manual reset capability.
    The on-chip, 2k-bit EEPROM memory features a 16-byte
    page. In addition, hardware data protection is provided by a
    V
    CC
    sense circuit that prevents writes to memory whenever
    V
    CC
    falls below the reset threshold or until V
    CC
    reaches the
    reset threshold during power up.
    Available packages include an 8-pin DIP, 8-pin SOIC, 8-pin
    TSSOP, 8-pin TDFN and 8-pin MSOP. The TDFN package
    thickness is 0.8mm maximum. TDFN footprint options are
    3x3mm.
    H
    A
    L
    O
    G
    E
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    F
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    TM
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