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參數(shù)資料
| 型號： | CAT1024VE-30 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | LEAD AND HALOGEN FREE, SOIC-8 |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 100K |
| 代理商： | CAT1024VE-30 |
3
CAT1024, CAT1025
Doc No. 3008, Rev. J
PIN DESCRIPTION
RESET/
RESET
RESET:
RESET OUTPUTS
(RESET CAT1025 Only)
These are open drain pins and
RESET can be used as a
manual reset trigger input. By forcing a reset condition on
the pin the device will initiate and maintain a reset condition.
The RESET pin must be connected through a pull-down
resistor, and the
RESET pin must be connected through a
pull-up resistor.
SDA:
SERIAL DATA ADDRESS
The bidirectional serial data/address pin is used to transfer
all data into and out of the device. The SDA pin is an open
drain output and can be wire-ORed with other open drain
or open collector outputs.
SCL:
SERIAL CLOCK
Serial clock input.
MR:
MANUAL RESET INPUT
Manual Reset input is a debounced input that can be
connected to an external source for Manual Reset.
Pulling the MR input low will generate a Reset condition.
Reset outputs are active while
MR input is low and for
the reset timeout period after
MR returns to high. The
input has an internal pull-up resistor.
WP (CAT1025 Only):
WRITE PROTECT INPUT
When tied to V
SS or left unconnected write operations
to the entire array are allowed. When tied to V
CC, the
entire array is protected. This input has an internal pull
down resistor.
CAT10XX FAMILY OVERVIEW
For supervisory circuits with embedded 16k EEPROM, please refer to the CAT1161, CAT1162 and CAT1163
data sheets.
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