參數(shù)資料
型號(hào)： CAT1161PI-45TE13
英文描述： Supervisory Circuits with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog Timer
中文描述： 監(jiān)控電路，帶有I2C串行CMOS EEPROM的，精密復(fù)位控制器和看門狗定時(shí)器
文件頁數(shù)： 9/12頁
文件大?。?/td> 69K
代理商： CAT1161PI-45TE13
9
CAT1161/2
Doc No. 3002, Rev. D
Acknowledge Polling
Disabling of the inputs can be used to take advantage of
the typical write cycle time. Once the stop condition is
issued to indicate the end of the host
’
s write opration, the
CAT1161/2 initiates the internal write cycle. ACK polling
can be initiated immediately. This involves issuing the
start condition followed by the slave address for a write
operation. If the CAT1161/2 is still busy with the write
operation, no ACK will be returned. If a write operation
has completed, an ACK will be returned and the host can
then proceed with the next read or write operation.
WRITE PROTECTION
The Write Protection feature allows the user to protect
against inadvertent memory array programming. If the
WP pin is tied to V
CC
, the entire memory array is
protected and becomes read only. The CAT1161/2 will
accept both slave and byte addresses, but the memory
location accessed is protected from programming by the
device
’
s failure to send an acknowledge after the first
byte of data is received.
Read Operations
The READ operation for the CAT1161/2 is initiated in the
same manner as the write operation with one exception,
that R/
W
bit is set to one. Three different READ operations
are possible: Immediate/Current Address READ,
Selective/Random READ and Sequential READ.
SCL
SDA
8TH BIT
STOP
NO ACK
DATA OUT
8
9
SLAVE
ADDRESS
S
A
C
K
DATA
N
O
A
C
K
S
T
O
P
P
BUS ACTIVITY:
MASTER
SDA LINE
S
T
A
R
T
Figure 9. Immediate Address Read Timing
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