參數(shù)資料
型號(hào): CAT1832V-T13
英文描述: 5V and 3.3V Supply Voltage Monitor and Reset Circuit
中文描述: 5V和3.3V電源電壓監(jiān)控和復(fù)位電路
文件頁(yè)數(shù): 6/9頁(yè)
文件大?。?/td> 117K
代理商: CAT1832V-T13
6
CAT1232LP/CAT1832
Doc. No. 25089, Rev. A
2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
WATCHDOG TIMER AND
A watchdog timer stops and restarts a microprocessor
that has stopped proper operation or become
hung
.
The watchdog performs this function by monitoring the
ST
input. After the reset outputs go inactive the
ST
input
must be strobed with a high-to-low signal transition prior
to the minimum watchdog timeout period. However if the
ST
input is not strobed with a high-to-low signal transi-
tion prior to a watchdog timeout the reset outputs will
become active for T
RST
reseting and restarting the
microprocessor. Once the resets return to the inactive
state the watchdog timer restarts the process.
ST
INPUT
The TD input allows the user to select from three
predetermined watchdog timeout periods. Always use
the minimum timeout period to determine the required
frequency of
ST
high-to-low transitions and the maxi-
mum to determine the time prior to the reset outputs
becoming active.
ST
pulse widths must be 20ns or
greater.
The watchdog timer cannot be disabled. It must be
strobed with a high-to-low signal transition to avoid a
watchdog timeout and subsequent reset.
Figure 6. Timing Diagram: Pushbutton Reset
V
IH
V
IL
V
OH
V
OL
RESET
RESET
PBRST
t
PDLY
t
PB
t
RST
RESET
RESET
ST
Valid
Strobe
Valid
Strobe
Invalid
Strobe
t
RST
t
ST
Note:ST is ignored whenever a reset is active.
t
TD
(Min)
t
TD
(Min)
Figure 4. CAT1832 Application Circuit:
Pushbutton Reset
Figure 7. Timing Diagram: Strobe Input
Figure 5. CAT1232LP Application Circuit: Watchdog Timer
PBRST
3.3V
1
VCC
TD
2
ST
TOL
CAT1832
μP
3
4
RESET
GND
8
7
6
5
RESET
RESET
I/O
PBRST
5V
1
10k
VCC
TD
2
ST
TOL
CAT1232LP
μP
Decoder
3
4
RESET
GND
8
7
6
5
RESET
MREQ
Address
Bus
RESET
e
g
a
V
v
e
L
N
G
D
T
l
D
)
m
(
d
o
e
P
t
u
o
-
m
i
g
o
d
h
c
W
N
I
M
L
A
N
I
M
O
N
X
A
M
5
6
0
5
1
0
5
2
g
n
o
0
5
2
0
0
6
0
0
0
1
V
C
C
0
0
5
0
0
2
1
0
0
0
2
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