參數(shù)資料
型號: CAT24C128YIT3
英文描述: 128-Kb I2C CMOS Serial EEPROM
中文描述: 128 - KB的的I2C的CMOS串行EEPROM
文件頁數(shù): 1/18頁
文件大?。?/td> 423K
代理商: CAT24C128YIT3
1
Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. MD-1103, Rev. J
CAT24C128
128-Kb I
2
C CMOS Serial EEPROM
PIN CONFIGURATION
FUNCTIONAL SYMBOL
FEATURES
Supports Standard and Fast I
2
C Protocol
1.8V to 5.5V Supply Voltage Range
64-Byte Page Write Buffer
Hardware Write Protection for entire memory
Schmitt Triggers and Noise Suppression Filters
on I
2
C Bus Inputs (SCL and SDA).
Low power CMOS technology
1,000,000 program/erase cycles
100 year data retention
Industrial and Extended temperature range
RoHS-compliant 8-lead PDIP, SOIC, TSSOP and
UDFN packages
PDIP (L)
SOIC (W)
TSSOP (Y)
UDFN (HU3)
VCC
VSS
SD
A
SCL
WP
CAT24C128
A2, A1, A0
DEVICE DESCRIPTION
The CAT24C128 is a 128-Kb Serial CMOS EEPROM,
internally organized as 16,384 words of 8 bits each.
It features a 64-byte page write buffer and supports
both the Standard (100 kHz) as well as Fast (400 kHz)
I
2
C protocol.
Write operations can be inhibited by taking the WP pin
High (this protects the entire memory).
8
7
6
5
VCC
WP
SCL
SDA
A2
A0
A1
VSS
1
2
3
4
For the location of Pin 1, please consult the
corresponding package drawing.
PIN FUNCTIONS
A
0
, A
1
, A
2
SDA
SCL
WP
V
CC
V
SS
Device Address Inputs
Serial Data Input/Output
Serial Clock Input
Write Protect Input
Power Supply
Ground
* Catalyst carries the I
2
C protocol under a license from the Philips Corporation.
For additional packages and Ordering
Information details, see page 15.
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