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參數(shù)資料
| 型號(hào)： | CAT24WC129LI-1.8TE13 |
| 英文描述： | 128K-Bit I2C Serial CMOS EEPROM |
| 中文描述： | 128K的位I2C串行CMOS EEPROM的 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 591K |
| 代理商： | CAT24WC129LI-1.8TE13 |
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FUNCTIONAL DESCRIPTION
CAT24WC129
3
Doc. No. 1079, Rev. V
A.C. CHARACTERISTICS
V
CC
= +1.8V to +6V, unless otherwise specified
Output Load is 1 TTL Gate and 100pF
Read & Write Cycle Limits
Symbol
Parameter
V
CC
=1.8V - 6.0V
Min.
V
CC
=2.5V - 6.0V
Min.
V
CC
=3.0V - 5.5V
Min.
Max.
Max.
Max.
Units
F
Clock Frequency
100
400
1000
kHz
AA
SCL Low to SDA Data Out
and ACK Out
0.1
3.5
0.05
0.9
0.05
0.55
μ
BUF(1)
Time the Bus Must be Free Before
a New Transmission Can Start
4.7
1.2
0.5
μ
HD:STA
Start Condition Hold Time
4.0
0.6
0.25
μ
μ
μ
μ
LOW
Clock Low Period
4.7
1.2
0.6
HIGH
Clock High Period
4.0
0.6
0.4
SU:STA
Start Condition Setup Time
(for a Repeated Start Condition)
4.0
0.6
0.25
HD:DAT
Data In Hold Time
0
0
0
ns
SU:DAT
Data In Setup Time
100
100
100
ns
R(1)
SDA and SCL Rise Time
1.0
0.3
0.3
μ
F(1)
SDA and SCL Fall Time
300
300
100
ns
SU:STO
Stop Condition Setup Time
4.7
0.6
0.25
μ
DH
Data Out Hold Time
100
50
50
ns
WR
Write Cycle Time
10
10
10
ms
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During
the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave
address.
Power-Up Timing
(1)(2)
Symbol
Parameter
Max.
Units
PUR
Power-Up to Read Operation
1
ms
PUW
Power-Up to Write Operation
1
ms
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) t
PUR
and t
PUW
are the delays required from the time V
CC
is stable until the specified operation can be initiated.
The CAT24WC129 supports the I
2
C Bus data transmis-
sion protocol. This Inter-Integrated Circuit Bus protocol
defines any device that sends data to the bus to be a
transmitter and any device receiving data to be a re-
ceiver. The transfer is controlled by the Master device
which generates the serial clock and all START and
STOP conditions for bus access. The CAT24WC129
operates as a Slave device. Both the Master device and
Slave device can operate as either transmitter or re-
ceiver, but the Master device controls which mode is
activated.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT24WC129P | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (384x8) 128k 16 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24WC129P-1.8 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (384x8) 128k 16 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24WC129PA | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (384x8) 128k 16 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24WC129PI | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (384x8) 128k 16 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24WC129PI-1.8 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (384x8) 128k 16 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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