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參數(shù)資料
| 型號(hào)： | CAT24WC256KA3TE13 |
| 元件分類： | EEPROM |
| 英文描述： | 256K-Bit I2C Serial CMOS EEPROM |
| 中文描述： | 256K位I2C串行CMOS EEPROM的 |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大?。?/td> | 417K |
| 代理商： | CAT24WC256KA3TE13 |
CAT24WC256
5
Doc. No. 1031, Rev. F
The features of the I
2
C bus protocol are defined as
follows:
(1) Data transfer may be initiated only when the bus is
not busy.
(2) During a data transfer, the data line must remain
stable whenever the clock line is high. Any changes
in the data line while the clock line is high will be
interpreted as a START or STOP condition.
START Condition
The START Condition precedes all commands to the
device, and is defined as a HIGH to LOW transition of
SDA when SCL is HIGH. The CAT24WC256 monitors
the SDA and SCL lines and will not respond until this
condition is met.
STOP Condition
A LOW to HIGH transition of SDA when SCL is HIGH
determines the STOP condition. All operations must end
with a STOP condition.
DEVICE ADDRESSING
The bus Master begins a transmission by sending a
START condition. The Master sends the address of the
particular slave device it is requesting. The five most
significant bits of the 8-bit slave address are fixed as
10100(Fig. 5). The CAT24WC256 uses the next two bits
as address bits. The address bits A1 and A0 allow as
Figure 4. Acknowledge Timing
Figure 5. Slave Address Bits
ACKNOWLEDGE
1
START
SCL FROM
MASTER
8
9
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
many as four devices on the same bus. These bits must
compare to their hardwired input pins. The last bit of the
slave address specifies whether a Read or Write opera-
tion is to be performed. When this bit is set to 1, a Read
operation is selected, and when set to 0, a Write opera-
tion is selected.
After the Master sends a START condition and the slave
address byte, the CAT24WC256 monitors the bus and
responds with an acknowledge (on the SDA line) when
its address matches the transmitted slave address. The
CAT24WC256 then performs a Read or Write operation
depending on the state of the R/W bit.
Acknowledge
After a successful data transfer, each receiving device is
required to generate an acknowledge. The Acknowledg-
ing device pulls down the SDA line during the ninth clock
cycle, signaling that it received the 8 bits of data.
The CAT24WC256 responds with an acknowledge after
receiving a START condition and its slave address. If the
device has been selected along with a write operation,
it responds with an acknowledge after receiving each 8-
bit byte.
When the CAT24WC256 begins a READ mode it trans-
mits 8 bits of data, releases the SDA line, and monitors
the line for an acknowledge. Once it receives this ac-
knowledge, the CAT24WC256 will continue to transmit
data. If no acknowledge is sent by the Master, the device
1
0
1
0
0
A1
A0
R/W
I
2
C BUS PROTOCOL
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CAT24WC256KA8TE13 | 256K-Bit I2C Serial CMOS EEPROM |
| CAT24WC256KI1TE13 | 256K-Bit I2C Serial CMOS EEPROM |
| CAT24WC256KI3TE13 | 256K-Bit I2C Serial CMOS EEPROM |
| CAT24WC256KI8TE13 | 256K-Bit I2C Serial CMOS EEPROM |
| CAT24WC256L1TE13 | 256K-Bit I2C Serial CMOS EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT24WC256KI | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (768x8) 256k 32 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24WC256KI-1.8 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (768x8) 256k 32 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24WC256L | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (768x8) 256k 32 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24WC256L-1.8 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (768x8) 256k 32 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT24WC256LA | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (768x8) 256k 32 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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