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參數(shù)資料
| 型號： | CAT24WC66PI |
| 元件分類： | PROM |
| 英文描述： | 8K X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 60K |
| 代理商： | CAT24WC66PI |
CAT24WC66
3
Doc. No. 1037, Rev. E
Write Cycle Limits
Symbol
Parameter
Min
Typ
Max
Units
tWR
Write Cycle Time
10
ms
The write cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
program/erase cycle. During the write cycle, the bus
interface circuits are disabled, SDA is allowed to remain
high, and the device does not respond to its slave
address.
A.C. CHARACTERISTICS
VCC = +1.8V to +6V, unless otherwise specified
Output Load is 1 TTL Gate and 100pF
Read & Write Cycle Limits
Power-Up Timing (1)(2)
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
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| CAT24WC66WI | 制造商:Catalyst Semiconductor 功能描述: |
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