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參數(shù)資料
| 型號(hào)： | CAT25C32U20STE13 |
| 英文描述： | 32K/64K-Bit SPI Serial CMOS EEPROM |
| 中文描述： | 32K/64K-Bit SPI串行EEPROM中的CMOS |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 82K |
| 代理商： | CAT25C32U20STE13 |
7
CAT25C32/64
Doc. No. 1001, Rev. G
READ Sequence
The part is selected by pulling
CS
low. The 8-bit read
instruction is transmitted to the CAT25C32/64, fol-
lowed by the 16-bit address(the three Most Significant
Bits are don
’
t care for 25C64 and four most significant
bits are don't care for 25C32).
After the correct read instruction and address are sent,
the data stored in the memory at the selected address
is shifted out on the SO pin. The data stored in the
memory at the next address can be read sequentially
by continuing to provide clock pulses. The internal
address pointer is automatically incremented to the
next higher address after each byte of data is shifted
out. When the highest address (1FFFh for 25C64 and
FFFh for 25C32) is reached, the address counter rolls
over to 0000h allowing the read cycle to be continued
indefinitely. The readoperation is terminated by pulling
the
CS
high.
To read the status register, RDSR instruction should be
sent. The contents of the status register are shifted out on
the SO line. The status register may be read at any time
even during a write cycle. Read sequece is illustrated in
Figure 4. Reading status register is illustrated in Figure 5.
WRITE Sequence
The CAT25C32/64 powers up in a Write Disable state. Prior
to any write instructions, the WREN instruction must be
sent to CAT25C32/64. The device goes into Write enable
state by pulling the
CS
low and then clocking the WREN
instruction into CAT25C32/64. The
CS
must be brought
high after the WREN instruction to enable writes to the
device. If the write operation is initiated immediately after
the WREN instruction without
CS
being brought high, the
data will not be written to thearray because the write enable
latch will not have been properly set. Also, for a successful
write operation the address of the memory location(s) to be
programmed must be outside the protected address field
location selected by the block protection level.
Figure 4. Read Instruction Timing
Figure 5. RDSR Instruction Timing
Note: Dashed Line= mode (1, 1)
—
—
—
—
Note: Dashed Line= mode (1, 1)
—
—
—
—
SK
SI
SO
0
0
0
0
0
0
1
1
BYTE ADDRESS*
0
1
2
3
4
5
6
7
8
9
10
20
21
22
23
24
25
26
27
28
29
30
7
6
5
4
3
2
1
0
*Please check the instruction set table for address
CS
OPCODE
DATA OUT
MSB
HIGH IMPEDANCE
0
1
2
3
4
5
6
7
8
10
9
11
12
13
14
SCK
SI
DATA OUT
MSB
HIGH IMPEDANCE
OPCODE
SO
7
6
5
4
3
2
1
0
CS
0
0
0
0
0
1
0
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT25C32V | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (4kx8) 32K 2.5-6.0 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C32V-1.8 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (4kx8) 32K 1.8-6.0 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C32V-1.8-TE13 | 制造商:ON Semiconductor 功能描述:EEPROM Serial-SPI 32K-Bit 4K x 8 2.5V/3.3V/5V 8-Pin SOIC N T/R |
| CAT25C32VA | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (4kx8) 32K 2.5-6.0 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| CAT25C32VI | 功能描述:電可擦除可編程只讀存儲(chǔ)器 (4kx8) 32K 2.5-6.0 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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