參數(shù)資料
型號: CAT28F512N-15
元件分類: PROM
英文描述: 64K X 8 FLASH 12V PROM, 150 ns, PQCC32
封裝: PLASTIC, LCC-32
文件頁數(shù): 2/15頁
文件大?。?/td> 427K
代理商: CAT28F512N-15
CAT28F512
10
Doc. No. 1084, Rev. H
Figure 5. Chip Erase Algorithm(1)
Note:
(1) The algorithm MUST BE FOLLOWED to ensure proper and reliable operation of the device.
40H;
START ERASURE
APPLY VPPH
INITIALIZE
ADDRESS
INITIALIZE
PLSCNT = 0
WRITE ERASE
SETUP COMMAND
WRITE ERASE
COMMAND
TIME OUT 10ms
WRITE ERASE
VERIFY COMMAND
TIME OUT 6
s
READ DATA
FROM DEVICE
DATA =
FFH?
LAST
ADDRESS?
WRITE READ
COMMAND
APPLY VPPL
ERASURE
COMPLETED
APPLY VPPL
ERASE
ERROR
INCREMENT
ADDRESS
INC PLSCNT
= 3000 ?
NO
YES
PROGRAM ALL
BYTES TO 00H
STANDBY
VPP RAMPS TO VPPH
(OR VPP HARDWIRED)
BUS
OPERATION COMMAND
COMMENTS
READ
STANDBY
WRITE
STANDBY
ERASE
VERIFY
READ
INITIALIZE ADDRESS
ALL BYTES SHALL BE
PROGRAMMED TO 00
BEFORE AN ERASE
OPERATION
PLSCNT = PULSE COUNT
ACTUAL ERASE
NEEDS 10ms PULSE,
DATA = 20H
WAIT
ADDRESS = BYTE TO VERIFY
DATA = 20H;
STOPS ERASE OPERATION
READ BYTE TO
VERIFY ERASURE
DATA = 00H
RESETS THE REGISTER
FOR READ OPERATION
VPP RAMPS TO VPPL
(OR VPP HARDWIRED)
WRITE
ERASE
WAIT
COMPARE OUTPUT TO FF
INCREMENT PULSE COUNT
DATA = 20H
A0H
1000
相關(guān)PDF資料
PDF描述
CAT28F512NA-12 64K X 8 FLASH 12V PROM, 120 ns, PQCC32
CAT28F512TR-15 64K X 8 FLASH 12V PROM, 150 ns, PDSO32
CAT28F512TRA-90 64K X 8 FLASH 12V PROM, 90 ns, PDSO32
CAT28LV256NA-25T 32K X 8 EEPROM 3V, 250 ns, PQCC32
CAT28LV256NI-20 32K X 8 EEPROM 3V, 200 ns, PQCC32
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