參數(shù)資料
型號: CAT28HT64
英文描述: 64K-Bit CMOS Parallel EEPROM(5V,快速,低功耗,64K位(8K x 8位)并行CMOS EEPROM)
中文描述: 64K的位CMOS并行的EEPROM(5V的,快速,低功耗,64K的位(8K的× 8位)并行的CMOS EEPROM的)
文件頁數(shù): 9/10頁
文件大?。?/td> 219K
代理商: CAT28HT64
CAT28HT64
8-47
Advanced
Stock No. 21064-04 2/98
Note:
(1)
Write protection is activated at this point whether or not any more writes are completed. Writing to addresses must occur within t
BLC
Max., after SDP activation.
HARDWARE DATA PROTECTION
The following is a list of hardware data protection fea-
tures that are incorporated into the CAT28HT64.
(1) V
CC
sense provides for write protection when V
CC
falls below 3.5V min.
(2) A power on delay mechanism, t
INIT
(see AC charac-
teristics), provides a 5 to 10 ms delay before a write
sequence, after V
CC
has reached 3.5V min.
(3) Write inhibit is activated by holding any one of OE
low, CE high or WE high.
(4) Noise pulses of less than 20 ns on the WE or CE
inputs will not result in a write cycle.
SOFTWARE DATA PROTECTION
The CAT28HT64 features a software controlled data
protection scheme which, once enabled, requires a data
algorithm to be issued to the device before a write can be
performed. The device is shipped from Catalyst with the
software protection NOT ENABLED (the CAT28HT64 is
in the standard operating mode).
Figure 9. Write Sequence for Activating Software
Data Protection
Figure 10. Write Sequence for Deactivating
Software Data Protection
5094 FHD F08
5094 FHD F09
WRITE DATA:
AA
ADDRESS:
1555
WRITE DATA:
55
ADDRESS:
0AAA
WRITE DATA:
80
ADDRESS:
1555
WRITE DATA:
AA
ADDRESS:
1555
WRITE DATA:
55
ADDRESS:
0AAA
WRITE DATA:
20
ADDRESS:
1555
PRSOFTWARE DATA
WRITE DATA:
XX
WRITE LAST BYTE
TO
LAST ADDRESS
TO ANY ADDRESS
WRITE DATA:
AA
ADDRESS:
1555
WRITE DATA:
55
ADDRESS:
0AAA
WRITE DATA:
A0
ADDRESS:
1555
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