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參數資料
| 型號： | CAT34RC02PETE13REV-E |
| 元件分類： | DRAM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個2 KB的EEPROM的國內256個8位每字舉辦的串行CMOS |
| 文件頁數： | 4/16頁 |
| 文件大小： | 445K |
| 代理商： | CAT34RC02PETE13REV-E |
CAT34RC02
4
Doc. No. 1052, Rev. K
FUNCTIONAL DESCRIPTION
The CAT34RC02 supports the I
2
C (2-wire) Bus data
transmission protocol. This Inter-Integrated Circuit Bus
protocol defines any device that sends data to the bus to
be a transmitter and any device receiving data to be a
receiver. Data transfer is controlled by the Master device
which generates the serial clock and all START and
STOP conditions for bus access. The CAT34RC02
operates as a Slave device. Both the Master and Slave
devices can operate as either transmitter or receiver, but
the Master alone assigns those roles. A maximum of 8
devices may be connected to the bus as determined by
the device address inputs A
0
, A
1
, and A
2
.
PIN DESCRIPTIONS
SCL:
Serial Clock
The serial clock input pin is used to clock all data
transfers into or out of the device.
SDA:
Serial Data/Address
The bidirectional serial data/address pin is used to
transfer data into and out of the device. This pin is an
open drain output in transmit mode.
A
0
, A
1
, A
2
:
Device Address Inputs
These inputs set the device address. When left floating,
the address pins are internally pulled to ground.
WP:
Write Protect
This input, when grounded or left floating, allows write
operations to the entire memory. When this pin is tied to
V
CC
, the entire memory is write protected.
START BIT
SDA
STOP BIT
SCL
Figure 3. Start/Stop Timing
Figure 2. Write Cycle Timing
Figure 1. Bus Timing
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
ACK
8th Bit
Byte n
SCL
SDA
tHIGH
SCL
SDA IN
SDA OUT
tLOW
tF
tLOW
tR
tBUF
tSU:STO
tSU:DAT
tHD:DAT
tHD:STA
tSU:STA
tAA
tDH
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|---|---|
| CAT34RC02LETE13REV-E | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| CAT34RC02LITE13REV-E | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| CAT34RC02SP2ETE13REV-E | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| CAT34RC02SP2ITE13REV-E | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| CAT34RC02UETE13REV-E | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CAT34RC02PITE13REV-E | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:2-kb I2C Serial EEPROM, Serial Presence Detect |
| CAT34RC02SP2ETE13REV-E | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:2-kb I2C Serial EEPROM, Serial Presence Detect |
| CAT34RC02SP2ITE13 | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:2-kb I2C Serial EEPROM, Serial Presence Detect |
| CAT34RC02SP2ITE13REV-E | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:2-kb I2C Serial EEPROM, Serial Presence Detect |
| CAT34RC02UETE13REV-E | 制造商:CATALYST 制造商全稱:Catalyst Semiconductor 功能描述:2-kb I2C Serial EEPROM, Serial Presence Detect |
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