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參數(shù)資料
| 型號(hào)： | CAT34WC02YITE13A |
| 元件分類(lèi)： | EEPROM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個(gè)2 KB的EEPROM的國(guó)內(nèi)256個(gè)8位每字舉辦的串行CMOS |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大?。?/td> | 284K |
| 代理商： | CAT34WC02YITE13A |
DsconinuedPat
CAT34WC02
4
Doc. No. 1003, Rev. O
2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
FUNCTIONAL DESCRIPTION
The CAT34WC02 supports the I
2
C Bus data transmis-
sion protocol. This Inter-Integrated Circuit Bus protocol
defines any device that sends data to the bus to be a
transmitter and any device receiving data to be a re-
ceiver. Data transfer is controlled by the Master device
which generates the serial clock and all START and
STOP conditions for bus access. The CAT34WC02
operates as a Slave device. Both the Master and Slave
devices can operate as either transmitter or receiver, but
the Master device controls which mode is activated. A
maximum of 8 devices may be connected to the bus as
determined by the device address inputs A0, A1, and A2.
PIN DESCRIPTIONS
SCL:
Serial Clock
The CAT34WC02 serial clock input pin is used to clock
all data transfers into or out of the device. This is an input
pin.
SDA:
Serial Data/Address
The CAT34WC02 bidirectional serial data/address pin
is used to transfer data into and out of the device. The
SDA pin is an open drain output and can be wire-ORed
with other open drain or open collector outputs.
These inputs set device address when cascading mul-
tiple devices. A maximum of eight devices can be
cascaded when using the device.
WP:
Write Protect
This input, when tied to GND, allows write operations to
the entire memory. For CAT34WC02 when this pin is
tied to V
CC
, the entire array of memory is write protected.
When left floating, memory is unprotected.
START BIT
SDA
STOP BIT
SCL
5020 FHD F05
5020 FHD F04
Figure 2. Write Cycle Timing
tWR
STOP
CONDITION
START
CONDITION
ADDRESS
ACK
8TH BIT
BYTE n
SCL
SDA
tHIGH
SCL
SDA IN
SDA OUT
tLOW
tF
tLOW
tR
tBUF
tSU:STO
tSU:DAT
tHD:DAT
tHD:STA
tSU:STA
tAA
tDH
5020 FHD F03
Figure 1. Bus Timing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT34WC02YITE13C | 制造商:CATALYST 制造商全稱(chēng):Catalyst Semiconductor 功能描述:2-kb I2C Serial EEPROM, Serial Presence Detect |
| CAT34WC02YITE13E | 制造商:CATALYST 制造商全稱(chēng):Catalyst Semiconductor 功能描述:2-kb I2C Serial EEPROM, Serial Presence Detect |
| CAT34WC02Y-TE13 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:EEPROM |
| CAT-354968-1 | 制造商:Samtec Inc 功能描述:CAT - Bulk |
| CAT35C102 | 制造商:CATALYST 制造商全稱(chēng):Catalyst Semiconductor 功能描述:2K-Bit SERIAL E2PROM |
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