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參數(shù)資料
| 型號(hào)： | CAT824LSDI-G |
| 英文描述： | System Supervisory Voltage Reset with Watchdog and Manual Reset |
| 中文描述： | 系統(tǒng)監(jiān)控電壓復(fù)位，帶有看門(mén)狗和手動(dòng)復(fù)位 |
| 文件頁(yè)數(shù)： | 8/14頁(yè) |
| 文件大?。?/td> | 210K |
| 代理商： | CAT824LSDI-G |
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CAT823, CAT824, CAT825
Doc. No. MD-3027 Rev. A
8
Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
WATCHDOG TIMER
The CAT823 and CAT824 provide a Watchdog input
(WDI). The watchdog timer function forces ˉˉˉˉˉˉ
(and RESET in the CAT824) signals active when the
WDI input does not have a transition from low-to-high
or high-to-low within 1.12 seconds. Timeout of the
watchdog starts when ˉˉˉˉˉˉ (RESET on the
CAT824) becomes inactive. If a transition occurs on
the WDI input pin prior to the watchdog time-out, the
watchdog timer is reset and begins to time-out again.
If the watchdog timer is allowed to time-out, then the
reset output(s) will go active for t
RP
and once released
will repeat the watchdog timeout process.
Figure 3 below shows a typical implementation of a
watchdog function. Any processor signal that repeats
dependant on the normal operation of the processor
or directed by the software operating on the processor
can be used to strobe the watchdog input. The most
reliable is a dedicated I/O output transitioned by a
specific software instruction.
The watchdog can be disabled by floating (or tri-
stating) the WDI input (see Figure 4). If the watchdog
is disabled the WDI pin will be pulled low for the first
7/8
th
’s of the watchdog period (t
WD
) and pulled high for
the last 1/8
th
of the watchdog period. This pulling low
of the WDI input and then high is used to detect an
open or tri-state condition and will continue to repeat
until the WDI input is driven high or low.
For most efficient operation of devices with the
watchdog function the WDI input should be held low
the majority of the time and only strobed high as
required to reset the watchdog timer.
Figure 3. Watchdog Timer
Figure 4. Watchdog Disable Circuit
RESET
CAT823
PIC
μC
DECODER
ADDRESS
V
CC
GND
WDI
MR
MCLR
Supply
Voltage
μC
OUTPUT
V
CC
Tristate
150k
110k
RESET
CAT823
V
CC
GND
WDI
MR
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| CAT824MTDI-G | System Supervisory Voltage Reset with Watchdog and Manual Reset |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CAT824LSDI-GT3 | 功能描述:監(jiān)控電路 RESET CONTL FLOATING GATE RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT824LTDI-G | 制造商:CATALYST 制造商全稱(chēng):Catalyst Semiconductor 功能描述:System Supervisory Voltage Reset with Watchdog and Manual Reset |
| CAT824LTDI-GT3 | 功能描述:監(jiān)控電路 act low act hi/WD RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| CAT824MSDI-G | 制造商:CATALYST 制造商全稱(chēng):Catalyst Semiconductor 功能描述:System Supervisory Voltage Reset with Watchdog and Manual Reset |
| CAT824MSDI-GT3 | 功能描述:監(jiān)控電路 RESET CONTL FLOATING GATE RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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