Figure 2. I2C Serial Interface" />
參數(shù)資料
型號(hào): CAT9554WI-GT2
廠商: ON Semiconductor
文件頁數(shù): 10/14頁
文件大小: 0K
描述: IC I/O EXPANDER I2C 8B 16SOIC
標(biāo)準(zhǔn)包裝: 1
接口: I²C,SM 總線
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 標(biāo)準(zhǔn)包裝
包括: POR
產(chǎn)品目錄頁面: 806 (CN2011-ZH PDF)
其它名稱: CAT9554WI-GT2DKR
CAT9554, CAT9554A
http://onsemi.com
5
SCL
SDA IN
SDA OUT
Figure 2. I2C Serial Interface Timing
tSU:STA
tAA
tF
tHD:STA
tHD:DAT
tLOW
tDH
tR
tSU:DAT
tLOW
tHIGH
tSU:STO
tBUF
Pin Description
SCL: Serial Clock
The serial clock input clocks all data transferred into or out
of the device. The SCL line requires a pullup resistor if it
is driven by an open drain output.
SDA: Serial Data/Address
The bidirectional serial data/address pin is used to transfer
all data into and out of the device. The SDA pin is an open
drain output and can be wireORed with other open drain or
open collector outputs. A pullup resistor must be connected
from SDA line to VCC. The value of the pullup resistor, RP,
can be calculated based on minimum and maximum values
from Figure 3 and Figure 4 (see Note).
A0, A1, A2: Device Address Inputs
These inputs are used for extended addressing capability.
The A0, A1, A2 pins should be hardwired to VCC or VSS.
When hardwired, up to eight CAT9554/9554As may be
addressed on a single bus system. The levels on these inputs
are compared with corresponding bits, A2, A1, A0, from the
slave address byte.
I/O0 to I/O7: Input / Output Ports
Any of these pins may be configured as input or output.
The simplified schematic of I/O0 to I/O7 is shown in
Figure 5. When an I/O is configured as an input, the Q1 and
Q2 output transistors are off creating a high impedance input
with a weak pullup resistor (typical 100 k
W). If the I/O pin
is configured as an output, the pushpull output stage is
enabled. Care should be taken if an external voltage is
applied to an I/O pin configured as an output due to the low
impedance paths that exist between the pin and either VCC
or VSS.
Figure 3. Minimum RP Value vs.
Supply Voltage
Figure 4. Maximum RP Value vs.
Bus Capacitance
VCC (V)
CBUS (pF)
4.8
4.4
4.0
3.6
3.2
2.8
2.4
2.0
0
0.5
1.0
1.5
2.0
2.5
400
350
300
200
150
100
50
0
1
2
3
4
6
7
8
R
Pmin
(K
W
)
R
Pmax
(K
W
)
5.2
5.6
IOL = 3 mA @ VOLmax
250
5
Fast Mode I2C Bus /
tr max 300 ns
NOTE: According to the Fast Mode I2C bus specification, for bus capacitance up to 200 pF, the pull up device can be a resistor. For bus
loads between 200 pF and 400 pF, the pullup device can be a current source (Imax = 3 mA) or a switched resistor circuit.
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